We are trying to synchronize two MMIC Evaluation Radar modules to work together. For that purpose, we removed the R43 resistor in order to disable the internal 100MHz clock and use the an external one by connecting a signal generator to the J1 connectors (REFIN). The signal that we are applying is a 100MHz CW sinewave with +5dBm of power.
Is this correct?
Many thanks for your valuable comments about this.
Regarding your suggestions of sharing a common PLL for both boards, or connecting somehow the LOout from the transmitter of the trasmitting board to all the receivers I guess you are referring to build it by ourselves using just the ICs, because doing those arrangements with the evaluation boards is not possible. It's a pity.
Just to summarize and to have clear some of the concepts of the MMIC-Radar, I will attach the schematic from the PLL, TX and RX with its connections, because I still don't quite understand a few things that I will enumerate:
1. The REFin that I introduce externally goes to ADF5901 and ADF4159 as purple line is showing isn't it? In that case, apart from controlling the VCO cal, we would be able to control VTUNE as well no? Is because this that makes me concern about a possibility to make chirp synchronization happen.
2. J7, according to page 7 of the MMIC-Radar EVB user guide (attached), it makes connection after the Loop Filter and before VTUNE. Is this an output port to check the VTUNE signal in an Spectrum Analyzer?
If you could provide me with an explanation to these two questions that would be great.
Thanks again for your time.
All the best,