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Phase noise spec of HMC767, HMC778


My customer wants to change the REF clcok of HMC767 and HMC778 from 50MHz to 10MHz.

In the case, the customer has some questions about phase noise spec on datasheet.

    1. At REF 10MHz, unwanted spur signals were observed in SSB Phase Noise specs of datasheets as below


          Could you please provide a design guide to minimize or eliminate the unwanted signal ?

      2. In another SSB Phase Noise specs of datssheets, unwanted spur signals were not observed as below


            What is the difference between the above spec and this spec ?

       3. In addition, could you please provide a design guide for thermal of high frequency PLL devices ?

Thanks a lot.

  • Hello,

    1. The reference spur is well away from the carrier and is easily filtered. If you're familiar with ADISimPLL you'll find several active loop filters (contain an op amp) with an RLC combination on the output of the op amp. These are good choices if you need additional attenuation of the reference spur although at -100dBc as in the above plots I'd be surprised if it's a problem.

    2. The Agilent E5052 Signal Source Analyzer that we use has an option to "omit spurs". This was most likely enabled for these plots as even in integer mode this spur will be present. 

    3. Not quite sure what you mean by a design guide for thermals of high frequency PLL devices. I recommend following the recommended footprint shown on the datasheet, including the thru vias in the paddle (or EP). You can also download the gerber files for most of our evaluation boards on

    Best Regards,