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ADL5303 input averaging for pulsed laser source

Category: Hardware
Product Number: ADL5303

We use the ADL5303 (single 5 V, buffer ~2.4×) to measure average optical power of a pulsed laser via an externally-biased InGaAs APD (not using VPDB). PRF 250 kHz down to 250 Hz min at ~1% duty; need to resolve average photocurrent down to a few nA.

To average the pulsed current before the log (averaging VLOG under-reports, since the log is concave), we added a multi-stage RC filter between the anode and INPT (~0.75 µF total shunt). The 250 Hz min sets the filtering requirement. Two problems:

  1. Cold-start dead-time. On a step up, there's a long delay before VLOG responds due to current-limited charging of the filter caps. A few nA into ~0.75 µF is very slow.
  2. Post-step tail. After an ON step, VLOG creeps for minutes.

Looking for advice on revising the input network to average the 250 Hz case while cutting dead-time and the post-step tail.

I'm happy to share the schematic if needed. 

Edit Notes

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[edited by: JakeF at 8:50 PM (GMT -4) on 8 Jul 2026]

Thread Notes

  • Hello,
    I would love to see a schematic, you're welcome to drop it here or send me an email. 

     

    I pulled what I think is your use case into LTSpice. Your issue, if I understand correctly, is that that the ADL5303 is too slow for your use case so you have to average the current output before it goes to the input of the part via a couple of caps but the delay induced by those caps is too high correct?

    That said, it does seem according to this spice simulation, which may not be an accurate reflection of your use case that the part can respond faster than 200ns to the pulse, tested with 10na. 

    That said again, you're easiest solution to this problem is to find a photodiode that can give you a little more current. 
     

     

    related, if you're only looking at power monitoring, have you looked at ADL5315/7

    Best, Aubrey

     

  • Hi Aubrey,

    Thanks for looking into this issue. Here is our schematic:

    We reverse voltage bias the PD in two modes: Low Bias = 0.65V and High Bias = 4V. The high bias is essential so that the PD can experience a high optical power input without being forward biased. The PD becomes forward biased at I_avg = (4.0 − 0.5) V / 222.85 kΩ ≈ 15.7 µA. 

    Our goal is to measure up to 25 µA average of photocurrent which will require a future redesign. This will allow us to measure 15.9 mW optical peaks at ~0.5% fine duty.

    The problem isn't that ADL5303 itself is too slow. The problem is with the input filtering which we require as we need to average the pulses at the current stage to derive the arithmetic mean. Your example circuit doesn't do this averaging which would require us to then average the output VLOG(t) instead. Averaging in the log space would result in computing the geometric mean of the pulsed photocurrent instead of the arithmetic mean (true average power). This method results in underreporting of the average power by many decades which would not be correctable via a fixed calibration curve. 

    Since posting this question, my team is no longer concerned with the dead-time (LPF charge up time) as this is a one time occurance upon power up. Instead we are mostly concerned with this Post-step tail. Essentially, we are seeing a steady-state creep (which is logarithmic) after a step response in optical light. This creep settles in ~5min and we believe it is likely due to the input LPF that we have added. 

    Swapping the photodiode with a higher current version doesn't solve our problem as it reduces the max measurable current before the photodiode becomes forward biased. 

    I also noticed that the ADL5303 datasheet shows the bandwidth collapsing to roughly 2 kHz at 1 nA. Does the LTSpice macromodel you used capture this current dependent bandwidth roll of?