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ADF4371 Recommended for New Designs
The ADF4371 allows implementation of fractional-N or Integer N phase-locked loop (PLL) frequency synthesizers when used with an external loop filter and...
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ADF4371 on Analog.com

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ADF4371 Issus with locking and SPI line resistors, and assembly issues

		
	
				

			

									
					    Steve_G1
					
							

            
            			
				
									
											
			
			
				
			
			
			    	
			                    
                
				                on May 7, 2026 
				
			
			
		

		
		                    	    

        	    
Thread Summary

                The user is experiencing issues with SPI communication with the ADF4371, which only works with 1.5k resistors on the clock or data lines. The final answer suggests probing the SCLK line with an oscilloscope to check for clock bounce and recommends trying smaller series resistors (100 Ohm or 300 Ohm) on SCLK, SDIO, and SDO lines. The user should also verify logic high and low voltages at the ADF4371 pins. Assembly issues with the ADF4371 are noted, and a link to an article on reliable PCB assembly of LGA packages is provided.
                                    

                    

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Category: Hardware

    		        		            		    
Product Number:  ADF4371  

    		        		    		    

		    		    
		    			

			    
Hello all,


We currently use the ADF4371 on a design where a microcontroller on another board communicates with it via SPI.

We are struggling to get it to work.

We can drive the ADF4371 evaluation board with our control board but ONLY if we use the 1.5k resistors on the clock or data lines.


Our clock speed is about 1 MHz.


Are these resistors necessary and wouldn't this limit higher clock rates.


The datasheet does not mention using them but we literally cannot get the eval board to work if we drive the SPI directly from the microncontroller.

We have also historically had assembly issues with these ICs. We have used the same footprint as on the eval board but the assembly houses are struggling to get them down correctly which adds another variable to the fault finding process.
Any footprint/ assembly suggestions?


kind regards


Steve

			

			
									
		                             
                        

    

                                            
                 Phase-Locked Loop (PLL) Synthesizers
                
                                                    
                 hardware
                
                                                    
                 ADF4371
                
                                                    
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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on May 8, 2026 5:18 PM
            
            
						
			            		
    
		
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    Hi Steve, 
    Regarding your first question, I'll need to check if there are any known issues with SPI programming. At first glance, it sounds like a clock bounce issue, that is, where one edge of the clock is interpreted as two or more edges because of maybe overshoot. I would suggest probing the digital lines, particularly the SCLK line on an oscilloscope to see how clean it is. Use a scope probe with as low a capacitance as you have access to. The presence of the capacitance of the scope probe can affect the shape of the waveform. The digital inputs have a capacitance of 3pF so you would like your probe to have less than this.  I would put the probe down at digital inputs of the ADF4371. It's also worth probing at the digital output of you SPI source to see if the signal is different. 
    What are your logic high and low voltages that you are observing at the pin of the ADF4371.
    I would suggest doing all of these experiments with and without the 1.5K series resistors (the resistors are in series, right?).
    Regarding assembly/soldering issues, here is a link to an article about this topic. It has some practical recommendations about pad sizes, paste mask sizes and solder mask sizes. 
    Best Regards
    Eamon Nash
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
				
				
				
		
		
    
			
		
    
	
    

    

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    •  Analog Employees  
    
            
						
                            
            
            				
            
                on May 8, 2026 5:18 PM
            
            
						
			            		
    
		
										0
					
	
    

		
		
    
		
    
                                
                                                            
    
					
    Hi Steve, 
    Regarding your first question, I'll need to check if there are any known issues with SPI programming. At first glance, it sounds like a clock bounce issue, that is, where one edge of the clock is interpreted as two or more edges because of maybe overshoot. I would suggest probing the digital lines, particularly the SCLK line on an oscilloscope to see how clean it is. Use a scope probe with as low a capacitance as you have access to. The presence of the capacitance of the scope probe can affect the shape of the waveform. The digital inputs have a capacitance of 3pF so you would like your probe to have less than this.  I would put the probe down at digital inputs of the ADF4371. It's also worth probing at the digital output of you SPI source to see if the signal is different. 
    What are your logic high and low voltages that you are observing at the pin of the ADF4371.
    I would suggest doing all of these experiments with and without the 1.5K series resistors (the resistors are in series, right?).
    Regarding assembly/soldering issues, here is a link to an article about this topic. It has some practical recommendations about pad sizes, paste mask sizes and solder mask sizes. 
    Best Regards
    Eamon Nash
    
			
    

		
			
	      

		
		
	
    
	
    
		
    
			
		
    
	
    
	
    
		
						
						
				
				
				
				
		
		
    
			
		
    
	
    

    

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