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ADRF5026: Input Impedance and Power Dissipation in "All-Off" State

Thread Summary

The user asked about the ADRF5026 SPDT switch's input impedance at the RFC port when both RF1 and RF2 are in the isolation state. The final answer clarifies that when EN is high (all channels off), RF1 and RF2 each see a 50 ohm termination, but the RFC port is open and reflects any applied power. The maximum power into each pin should not exceed 25 dBm. High-power applications should avoid this state to prevent reflections.

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Category: Hardware
Product Number: ADRF5026

Hi everyone,

I am looking into the ADRF5026 SPDT switch and I have a question regarding the input impedance (RFC port) when both output paths (RF1 and RF2) are set to the Isolation (Off) state.

According to the functional block diagram, the device uses internal 50ohm terminations for the isolated ports. My concern is the following:

If both RF1 and RF2 paths are switched to their isolation state simultaneously:

  1. Impedance Matching: Does the RFC port see both 50ohm termination resistors in parallel? If so, the input would be mismatched to 25ohm (VSWR 2:1), which could cause reflections back to the source.

  2. Power Dissipation: Where is the input power dissipated in this state? Is the total incident power split between the two internal resistors, or does the input switch structure reflect the power before it reaches the terminations?

Could you clarify if the RFC port remains matched to 50ohm when both channels are disabled, or if this state should be avoided in high-power applications?

Thanks in advance!

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