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Required configuration resistors for HMC981LP3E

Thread Summary

The user asked if resistors are required in both feedback paths when adjusting Vneg and Vgate_threshold on the HMC981LP3E. The support engineer confirmed that resistors are not always required in both paths, and the behavior observed (Vgate being pulled to Vneg) is expected under no-load conditions. The user verified the configuration by connecting the target amplifier (Mini-Circuits AVA-183MP+), and the issue resolved. The Vgate_threshold was slightly off, but the overall setup worked as intended.
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Category: Hardware
Product Number: HMC981LP3E

When adjusting Vneg and Vgate_threshold on the HMC981LP3E, are resistors always required in both feedback paths, or can Vgate_threshold be adjusted while Vneg remains at its default value of -2.5V?

I want to use the HMC981LP3E to bias a Mini-Circuits AVA-183MP+. The bias requirements in its datasheet say it needs -2V Vgs to pinch off the channel, so I want Vgate_threshold set to -2V. The note in the spreadsheet calculator says I need a threshold at least 300 mV more positive than Vneg, so I thought no adjustment would be necessary for Vneg. I added a 1.5 Meg resistor to the R6 position on the HMC981LP3E eval board, but on startup the value of Vgate is pulled all the way down to Vneg(-2.5V). The examples I have seen for configuring this part tend to adjust Vneg and Vgate_threshold in tandem, but AN-1363 doesn't specify that this is required. Is my problem just that I didn't choose do adjust Vneg up by 100 mV along with Vgate_threshold?

To be clear, I don't have the amplifier connected because I don't want the excessive negative voltage to damage the gate, so I've considered that the missing headroom between Vgate_threshold and Vneg could just be the expected behavior under a no load condition. If that's the case, is there a recommended way simulate an amplifier under control and verify the HMC981LP3E is properly configured without connecting it to an expensive amplifier?

  • Hi Kyle, 

     

    The resistors are not required in both feedback paths, as long as the VGATE threshold is 300 mV more positive than VNEG. You should be fine with just placing 1.5 Mohms between VGATE and VGATEFB.

     

    Are you applying an enable signal to the HMC981? In the HMC980 datasheet, whose function is very similar to the HMC981, there is mention that “when EN is pulled down to ground, the HMC980LP4E discharges VDRAIN and VG2 down to ground and pulls the VGATE pin to VNEG. VGATE goes down to VNEG regardless of the threshold level setting of VGATEFB”. 

     

    The lack of amplifier on the output could also be causing this. Let me investigate this on my end and get back to you.

     

    Thanks,

    Joe

  • I was leaving the EN pin floating since it's internally pulled high according to the datasheet. I have used the chip in previous designs and this is how I always configure it. Never noticed an issue before. I can double check my setup to make sure something isn't pulling that pin low though.

    I am 99% sure that I am installing the config resistor R6 in the correct spot, but can you give me a sanity check that the component locations marked up below are accurate? There are no silkscreen reference designators on the board for R4-7, so I had to manually trace out the Gerber files. I figure accidentally putting the resistor in the R7 slot would adjust Vgate_threshold in the wrong direction and could cause the issue I'm seeing.

  • Hi Kyle, 

     

    Leaving EN floating is fine since as you said it is internally pulled high. Regarding the resistors, the designators you made are all in the correct spots.

     

    Joe

  • Hi Joe,

    Was there any feedback regarding whether the behavior I am seeing is the expected no-load performance or not?

  • Hi Kyle, 

     

    Sorry for the wait. Are you able to make scope measurements on your HMC981?

     

    I managed to do a test with the HMC981 without an amplifier connected on the output. For reference, on this test, I used a 1 Mohm resistor for R6, to set a threshold of -1.8V. I triggered on VDD and took three scope shots - Figure 1 measuring VGATE, Figure 2 measuring VNEG, and Figure 3 measuring VGATE after some time.

     

    Figure 1:

     

    Figure 2:

     

     

    Figure 3:

     

     

    In both shots, CH1 is VNEG, CH2 is VGATE, and CH3 is VDD. The activity seen in the scope shots is the application of VDD. You can see that to start off with this test, VNEG is 0, VGATE is some positive voltage, and VDD is slightly. Once VDD goes high, VNEG goes to ~ -2.5 V and VGATE closely follows, also going to ~ -2.5 V. After ~45 ms, VGATE starts ramping up to ~ 2.45 V. 

     

    I will note the starting points of VGATE and VDD are not expected - when I tested by applying VDD first and then applying VDIG, this issue was not present.

     

    I will test next by trying the HMC981 with an amplifier, the HMC637ALP5E.

     

    Thanks,

    Joe

  • Joe, 

    This behavior looks very similar to what I was seeing. Vgate gets driven pretty much all the way to Vneg and at some point rises to a positive (presumably maximum) value. That ending value makes sense to me because the control loop would be trying to open the drain-source path to reach the current set point and never get there, so it would just saturate.

    I will get some scope captures of the waveforms and share them here so we can compare.

    Thanks,

    Kyle.

  • Joe,

    This is the no load performance I am seeing with 1.5 Meg resistor in the Vgate feedback path. C1 is Vdd and C2 is Vgate. The delay before Vgate rises and saturates is a lot less in my case, but otherwise I think we are seeing the same thing.

    I also got my hands on another HMC981 configured for a different amplifier and measured it with and without an amplifier attached.

    This is the no load response. C1=Vneg, C2=Vgate

    This is the response with the amplifier attached. C1=Vneg, C2=Vgate.

    Because the no load performance tracks with what you and I both saw previously, I was feeling lucky and hooked up my target amp, and it looks fine. I believe that noise at the transition is from my power supply hitting current limit briefly because I set it too low. 

    C1 is Vdd and C2 is Vgate.

    Vgate_threshold looks more like -1.75V than the -2V I was expecting, but that is a separate issue. Not sure what to make of it, but maybe it's related to the supply current limit triggering.

  • Hi Kyle, 

     

    I am happy to hear that your test with your target amp worked. Have you had a chance to test again without the supply current limit triggering? I haven't been able to test with a 1.5 Mohm resistor to get -2V threshold, but with 1 Mohm for -1.8V threshold, I was seeing -1.8 V during testing.

     

    Thanks,

    Joe

  • Closing this thread due to no further activity

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