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slope error in voltage vs phase angle plot

Thread Summary

The user is experiencing a small slope offset when using the AD 8302 to detect phase differences at 225 kHz. The final answer suggests fine-tuning the slope using resistors between VPHS and PSET, or calibrating the VPHS output in software by applying known phases and measuring the corresponding voltages to calculate and store the slope and intercept for each device.
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Category: Hardware
Product Number: AD8302

I am using a AD 8302 to detect the phase difference between two voltage signals.  The frequency is 225 kHz.   I used the application notes on the topics  of the AD 8302  to pick relevant input high pass filter and Cflt capacitors.

No mater what values of input and Cflt values I try,  however,   I get a small slope  offset like in the graph shown here.  My circuit is here.

Based on the data sheets, it  seams like I should not have to mess with the R110 (presently shunted) and  R111(presently open)  if I just want 1.8volts per 180 degrees.

  • While the datasheet specifies typical slopes for the VPHS phase output (e.g. 10mV/deg at 100 mHZ), the slope will vary on a device-to-device basis. So the device is not going to give you absolute accuracy. You have two options.

    1. Use the resistors between VPHS and PSET to fine tune the slope.  That will require that one of those resistors will be a potentiometer or a digipot. Also, in production, you will have to individually adjust each system.
    2. If you plan to digitize the VPHS output, you could calibrate in software. So, you would apply two known phases (say 30 deg and 150 deg), measure the corresponding VPHS voltages (or ADC codes) and back calculate the slope and intercept for that particular device. Once the slope and intercept ADC codes are calculated and stored, you can use them to calculate phase when the system is operational. 

       

      Best Regards

       

      Eamon