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Intermittent Readback Issue After Receiver Configuration on ADAR1000 Using SPI (LabVIEW)

Thread Summary

The user experiences inconsistent readback behavior with the ADAR1000 after configuring receiver-side registers via SPI using LabVIEW. The solution is to separate the soft reset write from the write that asserts the SDO active bits, as the initial reset write after configuration sets the SDO active bits low, causing the first readback to fail. The second attempt then successfully enables the SDO pin and returns valid data.
AI Generated Content
Category: Software
Product Number: ADAR1000
Software Version: LabVIEW 2021 32 bit

I am currently working with the ADAR1000 and controlling it through SPI using LabVIEW. I am experiencing an inconsistent readback behavior and would like assistance in understanding whether this is expected hardware behavior or if I may be doing something incorrectly.

Here is the issue in clear sequence:

  1. Initial Power-Up

    • After powering up the ADAR1000, I write to the Interface Configuration A (RESET) register.

    • When I perform a write followed immediately by a read, I successfully receive the correct readback data.

  2. Receiver Path Configuration

    • I then configure the receiver-side registers (RX state settings).

    • All SPI writes and readbacks are successful here as well.

  3. Issue After Receiver Configuration

    • After the receiver configuration, when I attempt to perform another reset write/read sequence, like reset the whole by using interface config A register, the first read attempt returns no valid data (readback array is empty or invalid).

    • However, when I perform the same operation a second time, I receive the correct readback values (e.g., soft reset bits in the Interface Config A register).

    • The correct data always appears on the second attempt, not the first.

This raises a question:
Is this a known/expected hardware behavior of the ADAR1000 SPI interface after RX configuration, or does this indicate a timing/SPI/initialization issue on my side?

I would appreciate guidance on:

  • Whether additional delays or SPI timing constraints are required after RX configuration

  • Whether any specific reset sequence or latch behavior exists on the ADAR1000

  • Any known issues related to readback immediately after changing states

Thank you for your support

Thread Notes

  • Are you using 4-wire SPI or 3-wire SPI?  

    If 4-wire SPI, are are asserting the soft reset bits and the SDO active bits within the same SPI write? 

  •   I am using 4 wire SPI.

    Yes I am asserting the reset bits and SDO active bits with in same SPI write

  • Yeah, I have seen this before.  I recommend separating the soft reset write from the write that asserts the SDO active bits.  

    I think what is happening here is your initial write after power-up, of the soft reset + SDO active does not actually soft reset the device since the device is already in a soft reset state by default upon power up.  So asserting the SDO active bits works and you are able to readback immediately.   

    However, when you do a soft reset + SDO active Write later on after configuring the ADAR1000, this write soft resets the device including setting the SDO active bits low, which is the default state.  A second soft reset + SDO active Write doesn't reset the device because it is already reset, and it enables the SDO pin just like when doing this Write immediately after power-up.  

  •   I appreciate your clear and accurate explanation. It resolved my confusion about the reset and SDO behavior. Thanks for the help.