Bias and power up LE VS VDD

Question

Hi, 
 I want to use the ADRF5474 in direct parallel mode. 
 Doing so, I want to feed Vss to -3,3V, Vdd and LE physically tied together to +3,3 V, 
 so bias sequencing will be: Vss, VDD and LE and after digital bits 
 Are there any consequences? 
 
 Thanks 
 Andrea

enash · Accepted Answer

Hi Andrea, there is no problem with connecting VDD and LE together. So your sequencing (VDD/LE come up before VSS and the bits come after that), will work fine. - Eamon)

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Bias and power up LE VS VDD

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