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ADAR4002 (EVAL-ADAR4002) SPI readback: no SDO activity via FTDI/pyftdi

Thread Summary

The user is unable to receive a response on SDO/MISO when reading from an EVAL-ADAR4002 board using an FTDI SPI bridge and Python. The final answer suggests checking if the MODE pin is set to Low to enable SPI mode. The setup includes a 4-wire SPI configuration with CPHA=1 and verified signals on the ADAR4002 pins.
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Category: Hardware
Product Number: ADAR4002, EVAL-ADAR4002, ADAR4002

Hi all,
I’m trying to communicate with an ADAR4002 on the EVAL-ADAR4002 board using an FTDI SPI bridge from a PC (Python, pyftdi.spi).
I can see my commands at the chip pins, but I get no response on SDO/MISO for reads.

Setup

  • Host: PC + FTDI SPI bridge (pyftdi.spi)
  • Board: EVAL-ADAR4002
  • SPI: 4-wire (CS, SCLK, SDI/MOSI, SDO/MISO)
  • CS goes low for each 24-bit word
  • SCLK: CPHA=1 (rising edge in the middle of the data bit); tried standard clock rates
  • Signals verified on the ADAR4002 pins with a scope/LA

Transactions sent (24-bit words)

  • 0x00 0x00 0xBD // Reset (per docs I have)
  • 0x00 0x00 0x18 // Set SPI 4-wire
  • 0x80 0x00 0x00 // Read (from addr 0x000)

Observed behavior

  • MOSI, SCLK, CS look clean
  • Keeping CS low and clocking extra bits also returns 0xFF

 

  • What do you have the MODE pin set to?  It should be Low if you want to use the ADAR4002 in SPI mode.

  • The Mode pin is already low, but no response.

  • How are you connecting your SPI signal to the ADAR4002 evaluation board? Are you connecting via the SMAs, P1 header, or the P10 header?  

    P10 has a Do Not Install resistor R6 on the SDO line.  You would need to populate this with a 0 Ohm resistor to readback correct when using P10.

  • I am using the P10 header as described in the manual.
    I am measuring at the pads of resistors R4, R90, and R91 that face toward the center of the board.
    The signals are present and at 1 V logic levels. At R92 it remains low.
    My protocol analyzer in the MSO also shows the hex values I am sending.

  • This is really weird behavior.  Have you tried writing to and reading from other registers?  For example, the scratch pad register 0xA? 

    Also, have you tried controlling the evaluation board with an SDP board and the ACE plugin?  

    You are driving into P10, so you are using the level translators.  

    • How do you have P8 configured?  This configures the high-side supply of the level translators (VL in the schematic).  With the SDP attached, P8 should have a jumper shorting Pins 1 and 2.  If you do not have the SDP connected, you would need to supply 3.3V (or whatever your high-side logic level is) to the VIO_3P test point.  
    • Alternatively, you can short Pins 2 and 3 on P8, and drive the high-side level shifter voltage on Pin 5 of P10 (V_LS in the schematic).