Hello. In the front-end where the TIA (ADA4857) output (VF1) drives the log amplifier (AD641) input (VF2), I observe significant distortion at VF2 for large input signals. I’d like ADI to verify whether my root-cause analysis is correct and to suggest recommended interface practices/mitigations.
Schematic, 
VF1/VF2 waveforms (R3 values sweep)
System setup
Front end: TIA (ADA4857), output node = VF1
Back end: AD641 log amplifier (signal applied to non-inverting input, inverting input is DC-biased)
R3 sweep: from a few ohms up to 1 kΩ
(Att. 1: schematic, Att. 2: waveform captures)
Observations (summary)
VF1 (TIA out): As R3 increases, the waveform becomes cleaner and the peak amplitude increases.
VF2 (AD641 in): As R3 increases, distortion gets worse (vs. the TIA output).
Input-level dependence: Distortion is minor for small inputs, but increases sharply at large inputs (saturation/overdrive, input amplitude ≥ 200 mV).
My hypothesis (requesting validation)
AD641 input behavior under overdrive: With large inputs, internal limiter/protection paths conduct and the input stage saturates, so the effective input impedance drops (tens to hundreds of ohms), and the dynamic input capacitance (incl. Miller) increases. As a result, at VF2 I get a nonlinear divider and I·R voltage drop (including kickback current), which produces the observed distortion.
Why VF1 looks cleaner when R3 is larger: R3 acts as a series isolator, limiting the abnormal current/charge drawn by the AD641 during overdrive from feeding back into the TIA. Thus VF1 is protected, while VF2 shows larger I·R drop and a longer RC recovery tail, hence more distortion.
Please confirm whether this interpretation is consistent with the AD641 internal structure and input behavior. My goal is to preserve VF1 waveform integrity while minimizing VF2 distortion.
Questions
1. Does the above root-cause analysis accurately reflect the AD641’s overdrive behavior and input impedance changes?
2. What interface/mitigation does ADI recommend?
3. Are there models/documents that help estimate the dynamic input capacitance and clamp points in the overdrive region (e.g., SPICE model parameters or equivalent-circuit guidance)?
Thank you.