Category: Hardware
Product Number: HMC561LP3
Hi, ADI team:
I'm planning to use the HMC561LP3 to design a frequency multiplication circuit.
When designing the bias circuit, I carefully read the document linked below and found two options for VDD/VGG biasing.
I'm currently leaning towards Figure 2: Fixed gate voltage biasing.
I have some questions about fixed gate voltage biasing:
1. What are the effects of not using the HMC561LP at the optimal bias point? Is it okay to just use the datasheet's Vgg = -1.7V, Vdd = 5V?
2. Does the optimal bias point vary significantly between different HMC561LP3s?
Thanks.