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Is it Possible to achieve this requirements in this IC

Thread Summary

The user inquires about the feasibility of sweeping 150 MHz in 0.1 μs using Analog PLLs in a Ramp Up-Down configuration. The final answer suggests that 100 ns is a very fast ramp time and recommends using ADISimPLL to simulate and investigate the ramp profiles. The solution emphasizes the need for high resolution and linearity in ramping, and mentions the importance of a wider frequency modulation bandwidth for maintaining gain flatness across the spectrum.
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Category: Hardware
Product Number: ADF4158
The key performance requirements are:
Frequency sweep 1 (in Ramp Up-Down configuration):
Start: 2.4 GHz
Stop: 2.485 GHz
Sweep time/sweep rate:  0.1 μs/ 10 MHz

Frequency sweep 2 (in Ramp Up-Down configuration):
Start: 5.725 GHz
Stop: 5.85 GHz
Sweep time/sweep rate:  0.1 μs/ 10 MHz

is it Possible to sweep 150MHz in 0.1us
Additional requirements:
Wider Frequency modulation bandwidth for maintaining gain flatness across the sept band
High resolution and linearity in ramping

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