The following bias sequence is called out in the ADMV1011 datasheet for the evaluation board:
Take the following steps to turn on the EVAL-ADMV1011:
- Power up VGRF1 and VGRF2 with a −1.8 V supply.
- Power up VCTL2 and VCTL3 with a −5 V supply for maximum conversion gain.
- Power up VDRF1 and VDRF2 with a 5 V supply.
- Power up VDLO with a 3.5 V supply.
- Adjust the VGRF1 supply between −1.8 V to −0.8 V until IDRF1 = 220 mA.
- Adjust the VGRF2 supply between −1.8 V to −0.8 V until IDRF2 = 75 mA.
In my application, I do not have active bias control to tune IDRF1 and IDRF2 on every power up. Instead I rely on fixed gate voltage for every unit. This gets my bias close to the desired level i.e. VGRF1 always powers up to -2.5V and VGRF2 powers up at -2.4V. Likewise, I fix VTCL2 and VCTL4 to -3.5V. So my sequence looks like:
- Power up VGRF1 at -2.5V and VGRF2 = -2.4V.
- Power up VCTL2 and VCTL3 with a −3.5 V supply for maximum conversion gain.
- Power up VDRF1 and VDRF2 with a 5 V supply.
- Power up VDLO with a 3.5 V supply.
Are there any risk for damage to the ADMV1011 using this approach?
