Serial mode on AD8366 eval board

Hi David, 

I will check into your question and will get back to you as soon as possible.

Best Regards

Eamon

Hi David,

the evaluation board supports parallel and serial mode operation. It appears that the eval board schematic is incorrect or at least incomplete as it does not include the digital header. 

AD8366 is an old part. While it is still in full production, it you are starting a new design, I think that there are better parts that we can recommend. If you can give me some guidance on your needs and target specs (e.g. gain range, operating frequency, with/without programmable filtering, etc), I can recommend some better alternatives. 

Best Regards

Eamon

Hi David,

my apologies. I mixed up your name with another customer. I think that you need to write exactly 12 bits when programming in serial mode. If you write 12 bits and 4 dummy bits for a total of 16 bits, I think that your data may get lost. 

I'm not able to find out the power on reset status of this part because it is very old. But I believe that we have a board in the lab to test this on. Please give me a day or two to work on this. 

Best Regards

Eamon

Hi Dave,

one of my colleagues set this up and verified that the part turns on at minimum gain. 

Best Regards

Eamon

Hi again Dave,

we ran a few other tests for completeness and discovered the following. 

1. SENB High on Power Up: A high on SENB puts the device is serial/SPI mode. In this mode, the device will always power up in min gain. State of DENA and DENB is 'don't care'.
2. SENB, DENA, DENB  Low on Power Up: Device will power up in minimum gain.
3. SENB Low, DENA and DENB High on Power Up: In this mode the device will power up at the gain that is indicated by the status of BIT0 to BIT5. In this mode, the gain directly follows the settings on BIT0 to BIT5. 

Hi David,

to your question about a 12-bit write vs a 16-bit write with four leading 0s, I tend to agree with you that the four leading 0s will just get clocked through the part and disappear. I need to think about how we can check this on the bench. We don't have a multi-channel logic generator on hand. I believe that we could “bit-bang” the sequence using the on-board DIP switches. My colleague did however mention that he found the setup a bit glitchy when he was doing the power-on testing. I'll talk to him and see what can be done. 

Best Regards

Eamon

Hi again David,

we tried to do a 16-bit write to the device on the bench using with DIP switches on the evaluation board, that is,  by manually flipping the clock and data signals up and down. As feared, there was too much glitchiness in the system and we were not able to get anything to work (i.e. neither a 12 bit write or a 16 bit write would work). So the result is that we cannot easily verify this on the bench (we also don't have a pattern generator on hand). Is this something you can verify on your side?

Eamon