Post Go back to editing

problem ramp generation

Thread Summary

The user encountered issues with generating a frequency ramp using the ADF4159, AD8065, and HMC431LP on a custom PCB. After troubleshooting, the problem was identified as an issue with the SPI CS code. The user resolved the issue and successfully performed the frequency ramp. The hardware and software were confirmed to be correct based on the single tone performance and lock detect functionality.
AI Generated Content
Category: Hardware
Product Number: ADF4159

Hi

I'm having issues generating a ramp using (ADF4159, AD8065, and HMC431LP). This combination is based on Application Note “AN-2548” to generate a sweep frequency tone. These components are integrated on a custom PCB. I used ADIsimPLL stware to design a Loop filter to cover the frequency band (5.5~6) GHz as shown in the next Fig.

I thoroughly read the ADF4159 datasheet and wrote a program to generate values for the ADF4159 registers, also “Analog Devices ADF4159 PLL” software was used to double-check the results as shown in the next Fig. and table

Register No

Registers value

R7

0x00000007

R6

0x000000A6

R6

0x00800006

R5

0x00402005

R5

0x00800005

R4

0x00180404

R4

0x00180144

R3

0x01030C83

R2

0x0700802A

R1

0x06668001

R0

0x801C1330

Also the time domain simulation as shown in the next Fig.

the Analog Devices ADF4159 PLL configuration 

True
False
True
False
500
1
0
0
0
3
0
0
8
0
0
0
True
4
0
0
0
0
1
0
0
0
1
1
0
0
7
False
False
0
100
0
11230.000001192092895507812500
5615.0000005960464477539062500
100
33554432
5033165
56
0
5615
1
0
0
0
5
0
3
0
0
0
7
0


0
0
0
0
0.000
0
0
0
0
0
0
0
20
8
1024
8
0
0
0
2
ABC123

The problem is that I only got a single tone (start frequency) with no sweep to the end frequency (NO RAMP). I did all the trials to test different modes of ramp, changed some parameters ( CLK1,2, DEV, CP current, frequency,…..), but in vain. Only I can get a single tone at a different start frequency and no ramp at all.

Sorry for prolongation, I have two questions:

First, since this PCB is a custom one, does getting the tone at the desired frequency mean that both HW and SW to program the ADF4159 are correct?   

Second, could ADF4159 part have an internal error so it can not generate voltage required to perform Ramp?

Finally, any suggestions to identify and fix this problem since the main objective of this PCB is to sweep frequency anywhere inside the frequency band of interest.

Really I have a hard time, so I would be grateful for any help.

Regards

maged

  • Hi Maged, 

    Thanks for sending the configuration and register values. 

    I couldnt observe any error on the register configuration. 

    I have couple of questions? 

    Have you ever disable the ramp and checked the single tone performance of the ADF4159? Can you read lock detect from MUXOUT?

    What happens to VTUNE voltage when you set the PLL for fixed frequency operation?

    What happens to Vtune voltage when you set the part continuous sawtooth ramp? 

    Thanks,

    Emrecan

  • Hi emrecangidik,

    Thank you for your quick response; I really appreciate it.

    First, as I mentioned earlier, I only receive a single tone at a specified frequency. I have no problem at all with single tone performance, though I haven't checked both lock detect from MUXOUT, or the tune voltage, but I'm going to check them and reply ASAP.

    Second, for Vtune voltage during continuous sawtooth ramp, it will be difficult for me, unfortunately, I have no oscilloscope 

    Could you reply for this question, "since this PCB is a custom one, does getting a tone at the desired frequency mean that both HW and SW to program the ADF4159 are correct?  " or the answer needs more investigation

    Regards

    Thanks

    Maged

  • Hi emrecangidik,

    Q1:"Have you ever disable the ramp and checked the single tone performance of the ADF4159? Can you read lock detect from MUXOUT?"

    A1: I have no problem at all with single tone performance, YES I can read lock detector it gives High

    Q2: "What happens to VTUNE voltage when you set the PLL for fixed frequency operation?"

    A2: it gives fixed VTUNE voltage that changes at different frequency value as expected

    Q3: What happens to Vtune voltage when you set the part continuous sawtooth ramp? 

    ok now for any type of ramp lock detect gives LOW, very small fixed VTUNE voltage, and VCO output is fixed at the start of its frequency band

    I am still trying to find a reason, but I couldn't manage, 

    Could you reply for this question, "since this PCB is a custom one, does getting a tone at the desired frequency mean that both HW and SW to program the ADF4159 are correct?  " or the answer needs more investigation

    Regards

    Thanks

    Maged

  • Hi emrecangidik,

    I'm still waiting your reply

    regards

    maged

  • Hi, 

    If the single tone performance is good. Then, I dont expect any problem with the hardware. Sweep parameters might incorrect. 

    Another important point is the opamp in the active loop filter.

    What is the supply voltage of the opamp? and what is the voltage value on the positive input of the opamp. This voltage should be set to 1.65V.

    Thanks,

    Emrecan

  • Hi emrecangidik,
    sorry for the late reply, unfortunately i'm working on another issue related to  AD9958. 
    Related to "opamp in the active loop filter" 
    i'm using AD8065, that have been used in CN-0302 in the same manner , and got the schematic using "ADIsimPLL" as shown in attached file
    the supply voltage of the opamp V+ = 10V,  V- = GND, and the voltage value on the positive input of the opamp IN+ =1.67 V the schematic of PCB is attached too  "Capture1.PNG" .
    Do you have any ideas on how to step further in solving  this issue , i'm  really stuck 
     
    Regards,
    Thanks,
    maged 
  • Hi Maged, 

    I couldnt find anything out of ordinary on the schematic. Can you try to lock the VCO to different frequency values while ramp is disabled? One other recommendation would be testing the circuit by modifying the loop filter to achieve 55 degree phase margin. 

    Thanks,

    Emrecan

  • Hi Emrecangidik,

    thank you for your support and advice, i used logic analyzer and it was a problem with code for SPI CS. now, i can perform frequency ramp with the chip. I hope this post may help others.

    thanks again Emrecan

    regards

    maged