Is there an option to compensate the phase change versus temperature

Question

When I variate the temperature like this: set temperature to -10 degrees at sample 0 set temperature to 10 degrees at sample 850 set temperature to 30 degrees at sample 1275 set temperature to 45 degrees at sample 2000 set temperature to 25 degrees at sample 3700 
 I get this (x-as trigger , y-as delta degree input - output) 
 
 For this test I have used evaluation module ADPA1106 + ADPULSERPLUSEBZ 
 Is there an option to compensate This phase change versus temperature? Can the phase change be compensated by changing the gate voltage? 
 I have fond AN-2578, but I didn't find the effect on phase AN-2578: Using the VREF Pin of RF Amplifier Power Detectors to Monitor Die Temperature | Analog Devices

enash · Accepted Answer

I think that this is going to be challenging. I'll start by stating that this is not something we have experience with or have tried to do. But after that caveat, let's proceed and consider the problem. 
 You do have the Vref voltage on the ADPA1106 device. So as is described in AN-2578, you effectively have a temperature sensor. The plot above is input to output phase (S21p) vs time and temperature, right? As the temperature changes the input-to-output phase also changes. If you are monitoring the supply current, you will also notice that it changes with temperature if you keep the gate voltage fixed. So one experiment you could try is to log your phase and supply current at 25 degC. Now as you vary the temperature, adjust the gate voltage (using the potentiometer on the PulserPlus board) so that you maintain the same supply current. And monitor the phase as you go to see if it is more stable. 
 Another experiment you could try is to attempt to keep the output power constant vs temperature, to see if that gives you more constant phase vs temperature. So again start by setting up the part at 25 degC. Now log the Vdet and Vref voltages and calculate Vref-Vdet. Vref-Vdet is a temperature-stabilized voltage that is proportional to the RF output power. As the temperature varies (monitor Vref), adjust the gate voltage so that Vref-Vdet remains constant. Monitor the input-to-output phase and see if it is more stable. than in your original experiment. 
 My sense is that keeping the supply current stable will be more effective. As you vary the gate voltage the effect on gain is weaker. Also as you adjust the gate voltage in an effort to stabilize the gain and output power, that adjustment will have a bigger impact on stuff like OP1dB. What I'm saying is that I believe that stabilized supply current is more likely to stabilize the s-parameters vs temp. But you should try both experiments.)

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Is there an option to compensate the phase change versus temperature

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