We have used “AD8304ARU” in our design. To measure the fiber optic photodiode current (IPD), we utilized this logarithmic amplifier IC. We are encountering an issue with its implementation, and I would like to explain the problem in detail to seek your guidance.
Here are the photodiode specifications:
|
Parameter |
Unit |
Value |
|
Operating Wavelength |
nm |
1520~1580 |
|
Dark Current |
nA |
0.4 to 1 |
|
Optical power range |
dBm |
-13 to 20 |
The schematic of the electrical section is illustrated in Figure below. The output voltage (Vout_to_ADC) is then digitized using an ADC with the part number “ADS7946SRTE” and processed by an FPGA.
After testing the designed circuit, we observed a discrepancy between the photodiode-reported power and the actual optical power. This difference occurred only when the optical input power to the photodiode was high, specifically within the range of 13 dBm to 20 dBm.
For optical power calculations, we used Equation (1) shown in the following image.
After identifying this issue, we reviewed the designed electronic circuit again and understood with default slope voltage and default intercept current, the positive voltage must be more than 4V.
We then tested our design with VPS1 = VPS2 = 5V and observed that the issue was resolved.
Now, we have some inquiries about this design:
- Could you please review our schematic design and confirm if our solution(using 5V positive voltage instead of 3.3v) is correct?
- Is it the most optimal solution?
- Considering that our product, which incorporates this circuit, has already been delivered to the customer and cannot be replaced, how can we compensate for this error? Specifically, we are only able to adjust and update the software-based calculations and no changes can be made to the hardware. Do you have any suggestions on how we might address the issue by adjusting the calculations? For instance, can we compensate for this error by adjusting Equation (1), as mentioned above?
