Hello all,
I have a project using a HMC835 PLL, to sweep the output frequency from 150MHz to 170MHz in 25kHz steps.
Normally everything is working fine, however sometimes the PLL will fail to obtain a VCO lock, and any successive updates of the NINT or NFRAC registers will also fail to obtain VCO lock.
Debugging the problem by reading out the PLL registers show that the SAR register value is high (indicating locking problem), the tuning register is also in the high end, and the BIAS register has an unexpected value (differs from default value: 0x54C1),
all others registers seems unaffected. Measuring the VTUNE output shows close to 0V, which also indicates the problem.
Register dump after failure:
1: CHIP_ENABLE_REGISTER = 3
2: REFDIV_REGISTER = 1
3: N_INT_REGISTER = 32
4: N_FRAC_REGISTER = 3D70A3
6: DSM_REGISTER = 30F3A
7: LOCK_DETECT_REGISTER = 200844
8: AN_EN_REGISTER = 41BFFF
9: CHARGE_PUMP_REGISTER = 577264
A: AUTOCAL_REGISTER = 47
B: PD_CP_REGISTER = 7C021
C: EXACT_FREQ_REGISTER = 1F40
F: GPO_REGISTER = 1
10: TUNING_REGISTER = FC <----------- [7:0] VCO Tune Curve, [8] VCO Tuning Busy = 1
11: SAR_REGISTER = 1F06 <----------- SAR Error Magnitude Count
12: LD_REGISTER = 1C <----------- [0] GPO Out, [1] Lock Detect Out
14: AUX_SPI_REG = 220
15: MAN_VCO_CONF_REGISTER = F48A0
16: OUTPUT_DIVIDER_REGISTER = 210
16: MODES_REGISTER = 1AB
18: BIAS_REGISTER = 1701A0 <----------- [18:0] Reserved, Program to 54C3h, [20:19] External Input Buffer Bias External input buffer bias setting. >=1.5GHz program 11, <1.5GHz program 10
1A: SEED_REGISTER = 401640
The datasheet states that the BIAS register should be written with the value 0x54C3 ? but does not state anything about the function or meaning of this register ?
Will the device itself update this register upon detecting an internal error state ?
After failure, re-writing 0x54C1 to the BIAS register, will correct the problem and successive frequency updates will result in VCO lock detection as normal.
Any ideas ?
Thanks
Brian