Unable to get HMC440 working

Hi Obabarin,

When you say evaluation module can you confirm if you mean the HMC440 evaluation board or just the chip?
Also, can you provide a typical configuration where your system does not seem to work for a proper context?

PFD frequency

Reference Frequency

PLL Clk output

divider value, if applicable

Was your board modified? if yes, can give a snippet of your schematics.

It may also help to send us your register values, to enable us replicate and debug your issue.

obabarin said:

HMC6380 VCO, that can take in CLK of 150-960MHz, REF of 25 to 160MHz at divider of 6

Please clarify this, do you mean 
PLL CLK output divided down 150-960MHz? Because HMC6380 is an 8-16GHz VCO

Hi JudeOsems ,

Thanks for replying to this.

1. By 'evaluation module', I mean the evaluation board i.e., the EVAL-HMC440QS16G.

2. The typical configuration I am working towards is as attached. At this stage though, I generate REF (say 100MHz) and VCO (say 600MHz) from two signal/waveform generators and simply connect NU/ND of the EVAL-HMC440QS16G to an oscilloscope. I ensured to put in jumpers S2/S4/S5 to make /N = 6

3. The only modifications performed on my EVAL-HMC440QS16G board was changing R2/R4 to 20-Ohm. Which I had since reverted to 4.3-Ohm.

4. I do not have register values. Could you tell how I would been able to read the registers of the EVAL-HMC440QS16G? As far as I understand, the HMC400 chip does not interface with a computer program, and only the counters A0-A4 are 'programmable', which can also be done via the jumper settings S1-S5.

5. "HMC6380 VCO, that can take in CLK of 150-960MHz, REF of 25 to 160MHz at divider of 6"

Statement above was not well constructed. I meant that PLL synthesizer (or phase frequency detector) should be able to take in 25-160MHz at its REF input and 150-960MHz at its VCO or CLK input with possibility of using a divider N=6 (and /R=1 or R not required).

Looking forward to reading further from you.

Hi Obabarin,

Just letting you know that we are currently investigating this issue. I will keep you posted as soon as we have an update on how you can fix your issue. Also, based on your topology, HMC440 would be the best fit for your use case. If we are unable to resolve your issue, we would then recommend another product that can closely match the performance of HMC440.

obabarin said:

4. I do not have register values. Could you tell how I would been able to read the registers of the EVAL-HMC440QS16G? As far as I understand, the HMC400 chip does not interface with a computer program, and only the counters A0-A4 are 'programmable', which can also be done via the jumper settings S1-S5.

Please disregard, I was going ask for your S1 -S5 jumper configuration, which you have provided in your reply. We will try to replicate this configuration and see if it produces the same issue as yours, that will help us advice on best approach to resolving this. Thanks.

Jude

Thanks for writing back to me JudeOsems .

I am trying out two approaches at my side also:

1. Will be introducing a buffer (sine wave to square) on both the REF and CLK inputs of the HMC440 eval board. This is in line with the suggestion in the circuit note CN-0290 and also tried by the user in ticket HMC3716 Phase Noise Floor - Q&A - RF and Microwave - EngineerZone (analog.com)

I chose the LT6957-1 and will be procuring the evaluation module DC1765A-A. I understand that the component LT6957-1 is at the "last time to buy" stage but at this point in my project, I will proceed with its use and in the future will replace it with the ADCLK905 (or its variants). Idea here is to get the setup to work, and improve where necessary later.

2. As it is not clear what is exactly wrong with the copy of the HMC440 on my evaluation board, I looked into offerings from ADI and came up with the idea to have separate PFD and prescaler/divider/counter. A suitable PFD I chose is the HMC3716, to be accompanied by the divider/counter HMC394.

An HMC4069 or HMC439 would have been chosen given that they have on-chip dividers just as the HMC440, but a little search on this platform -ADI EZ- shows a lots of complaints about these parts and it is best to avoid a repeat of the experience from the HMC440.

Kindly let me know if you and team comes up with a solution. I am open to try all options that could be available.

Thanks again!

Hi Obabarin,

We evaluated a random EVAL-HMC440QS16G board using your configuration. I have attached a screenshot of the expected NU/ND output.
REF = 100MHz

CLK = 600MHz

Vcc = 5V

Icc = 256mA

This seems to work so we recommend that
You should confirm that your current drawn is within 257mA (+/-2mA) on your 5V supply voltage. If this does not match, then it would indicate that your board is not working as it should or may have been damaged due to electrostatic discharge (ESD). This is a common with hmc440 as it is not robust enough to withstand ESD. If this is the case, then HMC4069 is another synthesizer that would suit your use case because it is more robust to handle ESD (you still need to apply ESD precautions). The LTC6957 is valid option, but since it is in its last time buy, we only recommend if you are hoping to change your design in future.

obabarin said:

2. As it is not clear what is exactly wrong with the copy of the HMC440 on my evaluation board, I looked into offerings from ADI and came up with the idea to have separate PFD and prescaler/divider/counter. A suitable PFD I chose is the HMC3716, to be accompanied by the divider/counter HMC394.

Having a separate PFD block and counter/divider is also valid design, although there may be other issues you will have to contend with especially related to timing. If your aim is to first have a working system, you may consider this approach.

Also, ensure your REF and CLK are synchronized. Although, you should still get an output if they are not, but the part will behave unpredictably if your input clocks are not reference synchronized.

Let us know how you get on.

Cheers.

Thanks for the comments Jude.

Could you please repost the image? It fails to load on my end.

Hi JudeOsems ,

Thanks for the comments.

I am unable to view the image you posted. Can that be reposted please?

I can also confirm that in my experiments, at 5V the HMC440 drew 0.26A. And I think that was why I could see some plots on my oscilloscope in the previous screenshots I shared.

As you opined, the device could have been destroyed by ESD, but I was sure to have an ESD mat on my desk and also ESD velcro attached to my shoes. Asides these precautions I have taken, would you have specific instructions for me going forward concerning ESD and the handling of these synthesizers?

2. Thanks for the heads up on ensuring synchronisation between the REF and CLK when using separate PFD and divider/counter. In the schematic I shared, the REF is from the AD9912 DDS and the LO is from a PLDRO. The idea is to have both the DDS and the PLDRO referenced from a 100MHz OCXO. There are dividers, multipliers, amplifiers and pads along the respective chains of the LO and the PLDRO to the 100MHz reference. Would you think these setups will still maintain the reference and sync will be achieved?

regards!

Hi Obabarin, 
I would think that if you are still seeing 0.26A current drawn then you are still within specification. Also, just to let you know that both screenshots (working and failed cases) have different resolutions. I suggest you try to use within 20ns/div resolution on your oscilloscope to be able to accurately represent your result. We also have a 1Mohm coupling on our osc channels.

obabarin said:

Asides these precautions I have taken, would you have specific instructions for me going forward concerning ESD and the handling of these synthesizers?

I believe the aforementioned precautions you are taking is enough, you may also handle these evaluation boards with care, making sure you avoid touching the components on the board directly, your lab equipment are properly grounded and there is an ESD wristband we usually wear while handling our evaluation boards. Those are the major precaution we take and I can think of. 

hi JudeOsems 

Thanks for the efforts in uploading the result from your setup. Several things caught my attention and I hope you can give more insights - they will be helpful for me and help clear some confusions:

1. I see that both NU and ND signals in your scope-shots are periodic at around 10ns/100MHz. Is this a normal behaviour and can be expected from the HMC440 (or any other synthesizer part)? If/When I see periodic signals around the period/frequency of my REF frequency in my test setup, can I be confident I have a functional part? 

My expectation would have been a 'phase difference' between the REF and the divided CLK. Which in the setup described would have been close to zero but not zero given the little phase difference we might expect between the signal sources/generators providing the REF and the CLK.

2. Datasheet specifies amplitude of 2Vpk-pk for the HMC440 (and most of the ADI's HMC synthesizer parts). Your reports for both ND/NU are quite lower than these values. The green trace with the larger amplitude is only around 400mV and the orange trace is even much lower. 

Question here is: if/when I see traces below 2Vpk-pk, can I consider that I have functioning part?

3. Do you recollect what amplitude/power levels were your REF and CLK? You only mentioned the frequencies, but no info on the amplitudes. Did you also have to use a buffer (signal to square wave) for any/both the REF and CLK signals?

Thanks for taking the time and the patience to reply to me. I greatly appreciate it.

regards,
obabarin

Hi obabarin ,

obabarin said:

My expectation would have been a 'phase difference' between the REF and the divided CLK. Which in the setup described would have been close to zero but not zero given the little phase difference we might expect between the signal sources/generators providing the REF and the CLK.

Yes this is correct. Sorry for the mix up earlier, the purpose of the first screenshot was to prove your configuration works, but for clarification and to validate your statement, I have attached a more valid screenshot showing the expectation of a functioning part. The NU/ND are periodic around 100ms as shown in the screenshot

REF = 100MHz
CLK = 600MHz + 60Hz phase difference

To get a sawtooth waveform shown, you need to make sure your bandwidth is limited to 20MHz.

obabarin said:

if/when I see traces below 2Vpk-pk, can I consider that I have functioning part?

A 2Vpk-pk on our synthesizers is considered as standard functioning part leaving a margin of +/-0.2V as in the screenshot I have sent.

obabarin said:

Do you recollect what amplitude/power levels were your REF and CLK? You only mentioned the frequencies, but no info on the amplitudes. Did you also have to use a buffer (signal to square wave) for any/both the REF and CLK signals?

No buffers were used, our REF/CLK are fed directly from a signal generator 0dBm power and a standard sign wave.

Cheers.