We are using the ADRF5020 in a new design and have been experiencing failures. Digging into the problem we discovered that our design does not follow the power up sequence that is given in the part data sheet so we believe that is causing our failures. We're going to change our design with the below improvements that were recommended in the data sheet and other forum posts. The data sheet also recommends having the RF signal off during IC power up, but we are unable to control this in our application. If the RF signal is present before the IC is powered up as recommended do we risk damaging the IC? Our maximum input level is +10dBm.
These are the power sequence improvements we're planning to implement...
1. Apply VDD before VSS
2. Add pull down resistors on the control lines
3. Add series 1.5k current limiting resistors in the control lines
4. Increase the bypass capacitance on the VDD and VSS lines
