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ADF5356 lock only on after the second REG0 writing

Thread Summary

The user is experiencing issues with the ADF5356 PLL locking on a custom board, requiring a second write to Register 0, unlike the development kit. The support engineer suggests re-writing Register 0 when double buffered settings (FRAC1, FRAC2, MOD2, RDIV2) are changed, even for a fixed output frequency. The user confirms the second write is only necessary on the custom board.
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Category: Hardware
Product Number: ADF5356

Hello! I am testing a new board with the ADF5356 PLL. The only way I get the LOCK state is when I repeat the REGISTER 0 writing. Can you explain this? Is it normal? Of course with the Development Kit I have only one writing for the REGISTER 0 and the lock state is fine.  The delay between REG1 writing and REG0 writing is 1 msec. Thanks!

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  • Hi,

    Register 0 should be re-written when a double buffered setting is changed (FRAC1, FRAC2, MOD2 RDIV2), you can see that under the program modes section in the datasheet. that includes RF divider selection also. are you updating output frequency periodically or you are operating a fixed output value? 

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