Is the eval board for the ADMV7310 plated? And what is the purpose of the hole on the top left? And there also vias to the left of the RF port with more pitch. What is the pitch of that?
ADMV7310
Recommended for New Designs
The ADMV7310 is a fully integrated system in package (SiP),
in phase/quadrature (I/Q) upconverter that operates between
an intermediate frequency (IF)...
Datasheet
ADMV7310 on Analog.com
Is the eval board for the ADMV7310 plated? And what is the purpose of the hole on the top left? And there also vias to the left of the RF port with more pitch. What is the pitch of that?
Hello Sadornasl,
Thanks for reaching out.
Yes, this eval board is plated. It's an alignment hole for the backplate which can be ignored. the pitch is 100mils and 50mils.
Hello Sadornasl,
Thanks for reaching out.
Yes, this eval board is plated. It's an alignment hole for the backplate which can be ignored. the pitch is 100mils and 50mils.
Thank you! That helps alot. Somewhat related question, the datasheet also has a different pitch for the vias close to the RF port dimension when compared to the eval board. In the datasheet the vias are in the same column but in the eval board the vias are in between two columns. Which one is correct?
Hi sadornasl,
Glad i am able to help!
I have verified our eval board layout and can confirm it's only one column above the RF waveguide opening you have highlighted.