ADF4355-3 register 8

Specifically if I set register 8 = 0x1A69A6B8 (the ADF4355-3 data sheet value) I get lock fails, but if I set register 8 = 0x15596568 (the ADF4356 data sheet value), or to 0x1A696668 (an in-between value) I do not get lock fails.

Hi,

I checked register 8 with the EVAL of ADF4355-3 and it works fine as 0x1A69A6B8. We suggest setting reserved registers as in the datasheet. are you comfortable with your auto calibration settings and loop filter parameters I suggest an ADIsimPLL check also. Do you use EVAL or you are testing on your own design board?

I do not use EVAL. It is my design board, initially using ADF4356 with no issues, the problem started when I downgraded to ADF4355-3 following the data sheet and guided by AN-1445.  I used ADIsimPLL with 900uA charge pump current in both cases. I do use auto-cal. But I will check loop filter values again.  But still it would be nice to know what Register 8 actually does.  Without knowledge it looks like magic, and magic is not what one wants in a production design!

I have used ADIsimPLL again and confirmed that my loop filter uses component value close to those ADIsimPLL specified for 74kHZ loop bandwidth and 300uA charge pump.  But to be doubly sure I re-ran ADIsimPLL for a lower loop bandwidth of 50kHz, margin 50degrees, and used the new component values. And there is no improvement: just as before the loop often fails to lock on its first attempt. And yet changing Register 8 improves as stated before. Here are my ADIsimPLL parameters:

Chip ADF4355-3, REF = 50MHz, required range 3.3G to 6.6GHz, charge-pump 900uA, bandwidth 50kHz, margin 50deg, digital lock signal

Filter: C1 769 (I used 750pF), C2 = 15nF, R1 = 2.2k, C3 = 279pF (I use 270pF), R1 = 686 (I use 680R).

Hi,
I checked your loop filter and it looks OK on ADIsimPLL. One main difference between ADF4355-3 and ADF4356 is that ADF4355-3 requires a Rset resistor, 5.1k for 900uA.  ADF4356 does not need this resistor. do you have this resistor on pin 22? Another difference is register 9, while ADF4356 has ALC (automatic level calibration) for calculating the lock time, ADF4355-3 does not have this section. would you check your register 9 settings also? 

Yes I have Rset populated as 5.1K.  Here is the register 9 value I'm using for ADF4355-3. Finding the right values for all the variables that make up R9 is not easy, especially as some of the formulae do not have consistent units (e.g. fPFD is sometimes in Hz, sometimes in MHz) so I could easily have wrong values.

R9 = 538263241 (decimal)
= 0x 20 15 3E C9
= 0b 00100000 0001010100 11111 01100 1001
= 0b 00100000 VCO BAND DIV = 32 (book value = 23?)
+ 0b          0001010100 TIMEOUT = 84
+ 0b                     11111 = RESERVED (all 1's)
+ 0b                           01100 = SYNTH LOCK TIMOUT = 12
+ 0b                                 1001 = 9 (register 9)

Hi,
thank you for sharing. These register values look fine. Can you share your other register settings?  I can take a look if there is anything that may cause this problem. 

Item Hexadecimal Decimal
R[12] 0xFFFF050C -64244
R[11] 0x0061200B 6365195
R[10] 0x60C01F7A 1623203706
R[09] 0x20153EC9 538263241
R[08] 0x1A69A6B8 443131576
R[07] 0x12000167 301990247
R[06] 0x55228006 1428324358
R[05] 0x00800034 8388660
R[04] 0x3000C984 805357956 this value is saved in a variable
R[03] 0x00000003 3
R[02] 0x00000000 0
R[01] 0x00000016 22
wait
R[00] 0x0000073A 1850

Initialization:
R12 through to R0 as above

Frequency Update:
R4 the above saved value*
R10
R2
R1
wait
R0
I then wait for MUXOUT (as digital lock) to go logic high

* I find that it is necessary to repeat the initialization value of R4, otherwise the ADF4355-3 "forgets" its MUXOUT configuration and MUXOUT becomes 3-state (i.e. high impedance).  With ADF4356 this is not necessary and instead I send R13 in this timeslot (although I do not use FRAC2 and MOD2 so R13 data is set to zero + the control bits = 13)

Sorry please ignore above - some values are incorrect

Accept my apologies!  What had happened here was that I was using debug registers 0 through to 5 for another purpose and had omitted to cancel that. So e.g. debug register R[05] was loaded with ADF4355-3 register 5 value and then overwritten by the other purpose.

As I have myself tried to analyse the ADF4355-3 register values I note that some differ from the data sheet slightly as I have followed AN-1353-RevD where it differs, in preference. I had spent some time on 'Bypass VCO Calibration' but had to abandon this as it failed occasionally (rather like now!). But that was several years back when this engine was first designed: the project has come back to haunt me because of temporary unavailability of ADF4356 which forced me to downgrade to ADF4355-3.

Item Hexadecimal 
R[12] 0xFFFF050C 
R[11] 0x0061200B 
R[10] 0x60C01F7A *
R[09] 0x20153EC9 
R[08] 0x1A69A6B8 
R[07] 0x12000167 
R[06] 0x55228006 Correct Value
R[05] 0x00800034 0x00800005
R[04] 0x3000C984 0x3000C984 this value is saved in a variable
R[03] 0x00000003 
R[02] 0x00000000 0x000000A2  *
R[01] 0x00000016 0x00000001  *
wait
R[00] 0x0000073A 0x00200440  *

* these values get over-written once the engine starts, as per 'Frequency update' below

Initialization:
R12 through to R0 as above - these value written only once after reboot

Frequency Update: - these values get written frequently in normal operation as the engine scans through frequencies from ~ 3.4GHz to ~ 6.6GHz
R4 the above saved value*
R10
R2
R1
wait
R0
I then wait for MUXOUT (as digital lock) to go logic high

* I find that it is necessary to repeat the initialization value of R4, otherwise the ADF4355-3 "forgets" its MUXOUT configuration and MUXOUT becomes 3-state (i.e. high impedance).  With ADF4356 this is not necessary and instead I send R13 in this timeslot (although I do not use FRAC2 and MOD2 so R13 data is set to zero + the control bits = 13)