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Problems with RF switch ADRF5020

Category: Hardware
Product Number: ADRF5020

Hello,

I am using a RF switch ADRF5020 in a RF module, and we are suffering some failures in this switch.

Attached to this message there is an schematic of the switch.

The supply voltages (+5V and -5V) are provided by a power supply with two channels. We use a laboratory power supply and we have measured the delay between voltages with an oscilloscope. We have measured that positive supply 

Reading again the datasheet of the component, I have found the following comment "Power up VDD and VSS. Powering up VSS after VDD avoids current transients on VDD during ramp up". This is a bit strange for me,as I am used with amplifiers to power up the negative voltage before the positive voltage.

Could anyone confirm that in this component is better to provide postive voltage before negative voltage?

As the CTRL signal is provided by VDD, this control signal is supplied at the same time that the positive voltage, and I don't know if this could be a problem. The enable signal is open circuit, maybe a pull down resistor would be a good idea.

When the switch is broken, we notice that the current in the Vss port increase, and as we provide the Vss=-2.5V through a voltage divider from -5V with to resistors, the voltage in the Vss pin goes to 0 Volt.

We would appreciate any recommendation to solve this problem. Thanks

Thanks.

Best regards,

Ignacio

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  • Hello

    Vss should be -2.5V nominally and absolute maximum rating is -2.75V on the datasheet. Please measure Vss pin voltage via oscilloscope at the ADRF5020 pin during ramp-up. We need to see there's no damaging ringing due to resistive divider network or very fast rise time. You may go beyond maximum allowed voltage due to ringing.

    The power up sequence is indeed Vdd first then Vss during power up. It's indeed the opposite of what amplifier usually requires.

    You can also add 1.5k or bigger resistor to limit current on control pin during start-up.

  • Thanks Yus,

    We have tested the voltage time response and it is clear that Vss is not higher than -2.5V, so the value of -2.75 is not got. 

    About the power up sequence, how much delay you will recommend between Vdd and Vss.

    Best regards,

    Ignacio

  • Ideally you turn on Vss after Vdd settled (90% of final value).
    I'd like to remind digital controls also need to be adjusted for power up sequencing. You may use pull down as you mentioned on digital controls considering they're tied to Vdd. On the other hand, you can use series 1k resistor in order to limit transient current.

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  • Ideally you turn on Vss after Vdd settled (90% of final value).
    I'd like to remind digital controls also need to be adjusted for power up sequencing. You may use pull down as you mentioned on digital controls considering they're tied to Vdd. On the other hand, you can use series 1k resistor in order to limit transient current.

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