ADPA1107 Gate Bias

Hi Eric,

                  Could you send me your schematic so I can se how you ar pulsing the gate? Why did you choose gate pulsing instead of drain pulsing? Normally we pulse the drain of GaN amps. Although it is acceptable to pulse the gate.

Regards,

Jim B

I am pulsing the drain.

However I still need to create the stable -2.7V bias. I am having trouble with getting a negative bias with very low ripple from a switch mode DC-DC converter

Hi Eric,

                     What devices are you using to generate the negative bias? Sound like you need to add capacitance or get a cleaner supply. What capacitance do you have on your gate. If you can share the part numbers?

Regards,

jim B

Hi Jim,

I am using this DC-DC converter: PDQE10-Q24-D9-DIN

It creates a -9V supply, which I put through an RC lowpass filter. (3 section filter with 0.16uF, 0.033uF, and 6.8nF capacitors) I have tried larger values aswell, however these are best results. 

After the filter I have tried simply using a voltage divider, also using a linear voltage regulator, and finally using an opamp to create the proper bias. All 3 ways seem to be only as stable as the -9V supply.

Is there a standard way to get this bias? possibly without using a switch mode DC-DC converter?

Thanks

Hi Eric,

                  What power supply are you using to drive the dc to dc converter? The noise spec on the converter is 80 mV p-p. Maybe the issue is being caused by the power supply used to drive the dc to dc converter. 

In the lab normally use Keithley 2400 to drive the gate.

I am checking with the power group for a recommendation for a suitable LDO to generate the negative voltage.

Regards,

Jim B

Hi Eric,

             Here is a low noise LDO that should work to provide the gate bias needed for the ADPA1107.

LT3093 (Rev. 0) (analog.com)

Regards,

Jim B

Hello, 

Moving this thread to the RF & Microwave Community.

Regards,
Paul