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How do I make ADF4350 VCO band selection Correctly?

Category: Hardware
Product Number: ADF4350, ADF4150

Hi, all

     I  am  Building A  clock generation system by combine ADF4350 and ADF4150.  ADF4350 work as VCO and ADF4150 work as PLL.

The same Ref_clock feed into ADF4350 and ADF4150 at the same time. VCO at ADF4350 has multiple Band and Band selection clock 

come from R divider output. In my system, R divider output clock frequency is 200k , So  I set the Band clock divider into 2 to make the 

Band logic selection clock not more than 125k.  My question is that I can't  make sure the Select Target Band as Power up or Reconfig 

ADF4350 by SPI IF,  As a result, ADF4150 can not lock  and RFout  is not my target frequency.  What should I do for  this Case?

Thanks  and hope guidance.

 

    

Parents
  • Hi,

    It is normal not to select the desired band at Power-up, that is partially random.

    ADF4350 should be programmed correctly (just like using in normal PLLVCO mode) to select the correct band. Then, the ADF4350 PLL disabled and ADF4350 VCO is connected to ADF4150 PLL. While running the autocalibration the Vtune input should be held floating. If Vtune is directly connected to ADF4150, that may drive it to an undesired level.

    Can you please share your schematic and ADF4350 register values that you are programming. 

    Regards, Kazim 

  • Hi, Kpeker

         Thank you for soon reply!  I think I have program ADF4350 correctly as working in PLL VCO mode. 

    In my project, Vtune of ADF4350 is drived by ADF4150  directly. The Block Diagram,  part of schematic and ADF4350

    Register value is listed below.   Hope more guide, Tks!

    PDF

  • Hi,

    A few checks:

    - While auto calibration is running the CP output should be tristate so that Vtune is driven internally. This is handled automatically in PLL/VCO parts. In your design, ADF4150 is always driving the ADF4350 Vtune input which may cause wrong band selection. You may tristate ADF4150 CP (or disable the part) before running the autocalibration on ADF4350. After autocalibration is completed, please check the output frequency, that will be unlocked but should be close to your target frequency. Then, enable the ADF4150 CP (or enable part). 

    - 200kHz is very low as reference frequency. Note that the datasheet spec is 10MHz. The lower frequency is possible but slew rate should be high enough. Is your reference sinewave or square wave? 

    - Are you able to lock ADF4350 itself in PLL/VCO mode by using the same 200kHz reference?

    - Same question for ADF4150?

    Regards,

    Kazim 

Reply
  • Hi,

    A few checks:

    - While auto calibration is running the CP output should be tristate so that Vtune is driven internally. This is handled automatically in PLL/VCO parts. In your design, ADF4150 is always driving the ADF4350 Vtune input which may cause wrong band selection. You may tristate ADF4150 CP (or disable the part) before running the autocalibration on ADF4350. After autocalibration is completed, please check the output frequency, that will be unlocked but should be close to your target frequency. Then, enable the ADF4150 CP (or enable part). 

    - 200kHz is very low as reference frequency. Note that the datasheet spec is 10MHz. The lower frequency is possible but slew rate should be high enough. Is your reference sinewave or square wave? 

    - Are you able to lock ADF4350 itself in PLL/VCO mode by using the same 200kHz reference?

    - Same question for ADF4150?

    Regards,

    Kazim 

Children
  • Hi, Kasim

         Thank you for reponse and check suggestion! 

               I  have completed a revision design that the latest previous one of this Rev, The previous revision ADF4350 can done the VCO subband

    selection and ADF4150 can lock as my expect.  So I make sure the Ref_clock of 200KHz  square wave can work well since feeded into ref clk slew rate

    meet the part spec requirement.  In my current revision another ADF4150 is added to be used as N-div and I  revise the LPF part net and its value for fast

    lock。 

              Now, I  show my config flow which implemented by CPLD logic device as controller.

       1. Power ON system board

       2. Power IC power good

       3. Enable ADF4350 by tie its CE pin to high

       4. Config ADF4350 by SPI,  write R5 - R0  (Ref clock input is stick to DC low level until later turn on it), CP out is set to Tri-state 

       5.  Delay and wait about 1.6ms after ADF4350 register write done. (I am waiting auto calibration done before ADF1450 enable)

       6.  Enable ADF4150 by tie its CE pin to high

       7.  Config ADF4150 by SPI, write R5 - R0 (Ref clock input is stick to DC low level until later turn on it), CP out is set to Enable

       8.  Turn on Ref clock and feedinto ADF4350 and ADF4150 at the same time

       9.  Check ADF4150 lock or not

           According to my config flow, I re-check your sugguestion.  Obviously, ADF4150 has not enable when  ADF4350 auto calibration running

    as my config flow, so I think ADF4150 will not influence ADF4350 auto calibration process. You mentioned that "After autocalibration is completed,

    please check the output frequency".   I have a question is that How i can know the autocalibration is done.

          As my config flow, I think ref clock must feed into ADF4350 immediately once done the SPI write action. So I have try this method but 

    it give me the same result that ADF4350 VCO band choose uncorrectly.

        Hope to get your furthermore guidance! 

       Best Regards !

        Simon Wu

  • Hi Simon,

    The reference signal should be available to select the correct VCO subband. Can you try turning it on after enabling the ADF4350 and before configuring ADF4350? 

    The autocalibration should take a couple of ms, do not bother with my comment there. I just like to say, check the ADF4350 output after step 5 in the above flow.

    Regards,

    Kazim 

  • Hi, Kazim

         I  try to turn on the ref clock after enable adf4350 and before its spi config. Then I  find  ADF4350  can not 

    choose sub band correctly even  disconnect LPF with Vtune.  I monitor N-divider output frequency through MUXOUT pin 

    when config done.  ADF4350  VCO work  at Max frequency Limit  which about 4.4GHz.  

          Best Regards!

              Simon Wu

  • Hi, Kazim

          I have got new result for ADF4350 Sub band  selection .   I find that  ADF4350 8bit Band select clock divider value  at 

    R4  DB19 to DB12 set to 1.  ADF4350 can select band correctly and I test repeat and the result is stable. 

    In this case The band selection logic clock is 200k.  I think it comflict with  data sheet description.  So  I  do guess  there is other  issue

    in my design.  

          Now  ADF4350 band seletion  seen ok and ADF4150  N-divider output and  ref clock input  phase lock all the way.

    But I find  the LD  pin of  ADF4150  can not go high.  Is this the LPF design  problem?  Please give me Instruction, Tks

         Best Regards!

             SImon Wu