I am Building A clock generation system by combine ADF4350 and ADF4150. ADF4350 work as VCO and ADF4150 work as PLL.
The same Ref_clock feed into ADF4350 and ADF4150 at the same time. VCO at ADF4350 has multiple Band and Band selection clock
come from R divider output. In my system, R divider output clock frequency is 200k , So I set the Band clock divider into 2 to make the
Band logic selection clock not more than 125k. My question is that I can't make sure the Select Target Band as Power up or Reconfig
ADF4350 by SPI IF, As a result, ADF4150 can not lock and RFout is not my target frequency. What should I do for this Case?
Thanks and hope guidance.