EV-ADF5610SD1Z has difficulty holding lock, seemingly influenced by surroundings and (potential coupling through) 6 volt power:
Summary question: (see bottom of this post) Are there known deficiencies in the EV-ADF5610SD1Z eval board design that lead to erratic lock behavior? In particular we are now concerned about power supply (or other coupling) that prevents multiple EV-ADF5610SD1Z boards from being used in the vicinity of each other.
We are using a set of eight EV-ADF5610D1Z boards as individual local oscillator sources for sets of both (4) ADVM1013 modulators and (4) ADMV1014 demodulators. The ADF5610's are programmed to generate local oscillator frequencies in the range of 6 to 10 GHz. Almost all experiments to date have been conducted with a 7 GHz LO. All hardware is built of an assembly of ADI evaluation boards (e.g. ADF5610, ADMV1013, and ADMV1014). Powering of the EV-ADF5610SD1Z is through SMA J7 (6 volts) done using shielded SMA pigtails in a "star" configuration back to the power supply / bus.
The ADF5610's are programmed in integer mode, using the EV-ADF5610SD1Z board's 50 MHz crystal source. This crystal source is locked to our bench 10 MHz, which is sourced from a low noise OCXO and distribution chain.
After programming the ADF5610's a lock indication is observed, and the output appears to be normal (frequency, power level) as observed on our Agilent N9030A PXA.
During the process of evaluating our modem performance we set up a loop back of the modem signal through an ADMV1013 to an ADMV1014. Both the ADMV1013 and ADMV1014 were sourced from individual ADF5610's. During these tests we observed small frequency offsets ( ~ 1 KHz) from the desired integer frequency multiple, followed by rapid phase hits. During this time the ADF5610 continues to show that it is in "lock state". When the ADMV1013 and ADMV1014 were sourced by a single ADF5610 this modem signal frequency / phase hit issue (not surprisingly) disappeared.
This behavior was further corroborated by monitoring the Vtune signal (available through SMA J2) with an oscilloscope, where tuning "hits" (quick jumps in Vtune) were followed by an exponential approach to a "steady state" tuning value.
As a further test we removed the modem modulation, using the ADMV1013 as a CW x4 frequency multiplier, and the ADMV1014 as an I/Q phase detector. The effective CW frequency between the ADMV1013 and ADMV1014 is 28 GHz. Two ADF5610 LO's are used, one for the ADMV1013, the second for the ADMV1014. In this configuration the low frequency offset appears as a sine wave output from the I/Q output of the AMDV1014: phase hits are also seen. (photo attached)
It is noted that the appearance of phase hits is effected by the influence of a hand several inches above the EV-ADF5610SD1Z, and sometimes the phase hits were synchronous with the 60 Hz mains frequency. It goes without saying that the Vtune signal, with it's large tuning (~ 100 MHz/volt) slope is a particularly vulnerable signal: sub-microvolts count!
Because of the observed body effects and the appearance of a 60 Hz influence, attempts were made at shielding. Each EV-ADF5610SD1Z was "sandwiched" between a pair of copper clad FR4 boards, with grounding between the copper clad and the sandwiched EV-ADF5610SD1Z. This helped but was not sufficient.
Having Vtune accessible through J2 was shown to be acting as a "stray antenna": R115 was removed to disconnect J2.
It was observed on the EV-ADF5610SD1Z board design the circuit path from the charge pump (CP) output to the tuning input (VT) takes a rather long circuitous (e.g. "looping") path around the ADF5610. Some of this trace is on the surface of the board (for loop back filter components) and other portions on an inner layer. A copper shield grounded to all coaxial jacks was fitted over the ADF5610 and nearby components in the hopes that this would effectively remove electric field influences (the shield probably did little to shield magnetic fields). This shield was insulated and reinforced on the bottom side to prevent shorts and to reduce microphonics first observed when the boards were physically "tapped". (photo attached)
Doing these steps did eliminate the low frequency offset and phase hits when only one or two EV-ADF5610SD1Z were used, although the setup is still vulnerable to occasional re-locks. (See photo) There remains an odd low frequency wander on the order of 25 to 30 Hz whose origin is not known: perhaps the EV-ADF5610SD1Z's 50 MHz oscillator?
HOWEVER, when multiple (more than 2) EV-ADF5610SD1Z were energized at the same time, the phase locking issues reemerged. This seems to be power supply related, but at this date that is not conclusive. Note that power is supplied through individual SMA pigtails to each EV-ADF5610SD1Z.
NOTE: In the near future the described bench setup will be evolving from a prototype to an implementation stage (custom PCB's, etc). Our customer is asking us for further information to corroborate that the above issues are indeed solely evaluation board issues, not device related issues, before commencing the implementation stage. This is a serious issue and we would like to put their concerns to rest, hopefully by illustrating to them that these are known (and "not surprising") EV-ADF5610SD1Z issues. Of particular concern are issues that limit the use of multiple ADF5610's. If there are known lock issues with the ADF5610 itself that would also be good to know.
Postscript: If the above description of operation suggests an improper EV-ADF5610SD1Z register setting, that would be good to know, as that can be rapidly assessed. I do note that several configuration of both the phase detector and charge pump settings were evaluated: none to date have solved the above lock issue.
