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Maximum capacitance value connected to ADL5511

Category: Datasheet/Specs
Product Number: ADL5511

Our customers are evaluating the ADL5511 on their board.

So we have received the following question. Could you assist me with answering it?

What is the maximum capacitance value to connect to EREF, FLT2, and FLT3 of the ADL5511?

Best regards,

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  • Hi okazu,

    Sorry about the delay responding to your query. 

    I don't think there is any limit on how big these two capacitors can be. Understand that the larger these two capacitors are, the slower will be the envelope output response time, and also the envelope output bandwidth becomes effectively narrower. Ideally, the best values for most applications will be obtained by choosing values that are just large enough to effectively attenuate the carrier leakage, but not much larger, to allow most favorable envelope response time and bandwidth. Keep in mind that larger capacitors can have more leakage or series resistance, which can degrade performance. 

    The EREF pin is much different from FLT2 and FLT3. It's probably best to keep external capacitance low on this pin, meaning maybe 100 to 1000 pF. If excess RF ripple is observed on EREF, larger capacitance value can be used if the series resistor provision is also used, to help isolate the external capacitor. The factory eval board has such provision, R20 and C7.