Hmc832a configuration issue

I am trying to configure a hmc832a evaluation board in fractional mode, but the output frequency does not match my configuration.

The pll is configured by sending the following data/address pairs through spi (the frequency variable is set to 2200):

    uint32_t data[] = {
                    0x20,//readAddress soft reset
                    0x2,//reset
                    0x1,//refDiv
                    ((0x1 << 7) | (vcoDiv)),//vcoSpi rf divider = 1
                    ((0x1F << 7) | (vcoConf << 3)),//vcoSpi
                    (0x9B << 7 | (vcoPwrCtrl << 3)),//vcoSpi
                    0x0,//vcoSpi required to write 0 in order to be ready for autocalibration
                    0xF4A,//sigmaDelta
                    0x8CD,//lockDetect
                    0xC1BEEF,//analogEnable
                    0x393264,//cpReg tbd
                    0x85,//autoCal 
                    0x4F80E1,//PdReg set 3.3V mode
                    0x0,//exactFreq disabled
                    0x1,//gpoSpiRDiv lockdetect when not miso
                    frequency/50,//nInt
                    round(fmod(frequency, 50.0)*pow(2,24)/50.0),//nFraq
                    };

    char address[] = {
                    readAddress,
                    reset,
                    refDiv,
                    vcoSpi,
                    vcoSpi,
                    vcoSpi,
                    vcoSpi,
                    sigmaDelta,
                    lockDetect,
                    analogEnable,
                    cpReg,
                    autoCal,
                    pdReg,
                    exactFreq,
                    gpoSpiRDiv,
                    intReg,
                    fractReg
                    };

Reading back from the pll I get:

register 0 = f 32 75
register 1 = 0 0 2
register 2 = 0 0 1
register 3 = 0 0 2c
register 4 = 0 0 0
register 5 = 0 0 0
register 6 = 0 f 4a
register 7 = 0 8 cd
register 8 = c1 be ef
register 9 = 39 32 64
register a = 0 0 85
register b = 4f 80 e1
register c = 0 0 0
register d = 0 0 0
register e = 0 0 0
register f = 0 0 1
register 10 = 0 0 c0
register 11 = 0 b 12
register 12 = 0 0 0
register 13 = 0 12 59

With these configurations, the output frequency is 1.336GHz while I was expecting 2.2GHz.

Have I missed something in my configuration sequence or are there some other possible explanation?