Category: Hardware
Product Number: ADF4372 EVAL board
Software Version: ACE 1.22.3063.1372(x64)
Hello, I'm RF engnieer.
I have tested ADF4372 EVAL board to generate 2680.5MHz.
PFD frequency is 100MHz, VCO output frequency is 5361MHz, Divider setting is 2
The rest settings are the ACE program default settings.
spurious is output at 2680.5MHz and 5361MHz frequncies.
spurious keep moving left and right. Blue line is maxhold value.
Divider settings 2 and 4, spurious are output.
If change the setting of the divider to 1, the spurious disappears.
The only difference is the divider setting.
2680.5MHz is a specially generated frequency.
It also reduce spuious by SDM or changing FRAC2 to 0
SDM operates differently for each frequency, and changing FRAC2 to 0 causes the frequency to shift.
I guess is that the divider setting affects spurious.
