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ADF4159 - Hardware and Software setup

Category: Hardware
Product Number: EV-ADF4159EB3Z

Hi all,

We are working with ADF4159 product and trying to setup a FMCW triangular waveform, centered at 12.075 GHz, 200 MHz Bandwidth for a pulse duration of 2*250 µs (250 µs rising frequencies then 250 µs decreasing frequencies).

With the eval board default values of components for loop filter (page 4 of ug-383.pdf), we see in AdiSimPLL that we may have frquency errors : 

With ADISimPLL we see that we should changes these components values, such as in screenshot below :

We also found the software parameters to apply 100

However, when doing so, then the output signal does not match at all the expected waveform : we get fixed frequency instead of FM and reciprocally. It looks the PLL is not in the right mode.

Do you have any feedback ?

What should we on the hardware and/or the software parameters in order to get the expected waveform (specificied at the beginning of this post) ?

Thanks in advance for the help !

Best regards

Parents
  • Can you send your software writes, and also the ADIsimPLL file? So I can see how PLL ins configured and which VCO are you using.

    You need to enable ramping by using Reg0[31] = 1. It is also possible you are configured for a single ramp mode and you've missed the ramp in your measurement, make sure you have continuous triangular selected.

    Is the PLL locked in your current fixed frequency output? It is often useful to look at vtune on a scope and comparing it with the ADIsimPLL results you have

    Also, 600kHz loop bandwidth may be slightly too wide for the OP184 op-amp we have on this board since its GBP is only 4MHz. I would suggest aiming for loop BW <400kHz

  • Hi !

    Thanks for the prompt feedback, please find attached the ADIsimPLL file (renamed as *.txt instead of *.pll) and the configuration file we use with ADF4158/9/69 PLL Software (version v4.10.6 July 2015)

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    We are back from summer closing and investigate your recommandations. Please let us know if you find anything with our files.

Reply
  • Hi !

    Thanks for the prompt feedback, please find attached the ADIsimPLL file (renamed as *.txt instead of *.pll) and the configuration file we use with ADF4158/9/69 PLL Software (version v4.10.6 July 2015)

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    We are back from summer closing and investigate your recommandations. Please let us know if you find anything with our files.

Children
  • You have a typo in your software settings in the VCO output frequency box, it looks there is a comma for a decimal place which the software does not support - it needs to be a period. So effectively you are trying to program the part for 60.125GHz. There are warning errors in the software GUI which should have alerted this to you. 

    Correct:

  • This might be a Windows language issue. Here it works well with, if we change then we get the error. 

    Meanwhile we looked at Vtune : it seems to have a good appearance and the FMCW start/stop frequencies are correct. Howeve Vtune voltage is different from simulation. We have 5 --> 5.7V in measurement, but in simulation we expect it to be between 6 and 7 V. 

    See attachments below 

  • Hi, Yes vtune often can vary somewhat due to the nature of the VCO's sensitivity which often can vary a lot due to part-part variation. This is the reason we don't give VCO sensitivity as a min/max spec in the datasheet, only a typical value. This also makes it quite difficult to simulate an accurate vtune voltage. Although >1V difference is quite large. This also could be related to differences in the actual soldered loop filter components vs the components you have selected in the simulation, as well as the tolerance. I think what you are seeing is normal behaviour.