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Individual delay when dual ramp feature enabled

Category: Datasheet/Specs
Product Number: ADF4159

Hello team,

I enabled the dual ramp feature of the PLL by setting register values as per the following

Observed the MUXOUT signal behavior in oscilloscope. The timing matched the above specifications.

But I have a question. Is it possible or is there any way to give separate delay for two ramps when PLL is in dual ramp mode?

Thanks and regards,