Strong peak in ramp signal generation

Is the VCO output connected directly to spectrum analyser with SMA type cabling or are you using an antenna? What is the signal power when in fixed frequency CW mode, with ramping disabled?
Could you send details of the VCO and loop filter you are using, or your ADIsimPLL file (you may need to .zip the ADIsimPLL file to attach it to EZ)

Could you also look at measuring vtune on a a scope to check ramp profile and timing matches with ADIsimPLL sim

Sorry, the sweep duration was 4.02usec.

VCO output is directly connected to spectrum analyzer with SMA type cable.

In CW mode, signal power was +6dBm.

VCO used was HMC510LP5.

Regarding time match verification, I used oscilloscope and verified.

Measure Vtune in oscilloscope or using multi-meter?

In case the attached zip didn't open, the please refer this below image of ADIsimPLL sim file.

Thanks and regards,

GAR.

Apologies for attaching wrong simulation file. The loop filter of the PLL I used was a factory default loop filter. 

And the VCO was the on-board HMC515LP5 VCO.

The on board VCO HMC515 only covers 11.5 - 12.5 GHz, how are you measuring 9.385GHz?

The on board VCO HMC515 only covers 11.5 - 12.5 GHz, how are you measuring 9.385GHz?

Sorry my mistake. It was indeed HMC510 (which covers 8.55 to 9.55 GHz) VCO I used for the experiment. 

Please take the simulation file I attached and also the first reply I have given into consideration. 

Got it, thanks for clarification. I think the loop filter is fine. From what I can see it looks like the PLL is not ramping correctly, or the spectrum analyser is not displaying the ramp. It appears if only the ~39us of delay when the PLL is at the start frequency is being displayed. Did you try with max hold enabled?