HMC3716 Phase Noise Floor

Hello ADI support team,

I am frequently using HMC3716LP4E as phase frequency detector in high performance PLL designs. Often, the phase noise performance of my circuit is limited by the phase noise floor of the chip. On the datasheet, it is shown that the phase noise floor is much better when a square wave signal is used as the reference. My reference signals are generally very low phase noise sine wave sources (e.g. OCXOs). I am looking for a way to convert these signals to square waves with minimal degradation in phase noise.

Recently, I used LTC6957-1 as a buffer (sine-to-square converter) before the reference and VCO inputs of HMC3716 in a divide-by-1 PLL configuration. The reference is a very low phase noise (much lower than phase noise floor of HMC3716) OCXO at 100MHz. The PLL loop filter is wide enough to see the effects of PLL components at the output. What I observe is exactly the same as the phase noise floor of HMC3716 for sine wave inputs. I measured the phase noise with and without LTC6757-1 as a buffer, result is same. I attached my block diagram and how I interface LTC6957 to HMC3716 in the picture. I request your invaluable comments on how I can improve HMC3716 phase noise floor and get a performance like those shown for square wave inputs in the datasheet.

Kind regards