Hi
Does the ADF4110 compare the rising edge of REF and the rising edge of RFinA and align their phases, or does the ADF4110 compare the falling edges of REF and the falling edge of RFinA and align their phases?
Best regards
N.Kokubo
Hi
Does the ADF4110 compare the rising edge of REF and the rising edge of RFinA and align their phases, or does the ADF4110 compare the falling edges of REF and the falling edge of RFinA and align their phases?
Best regards
N.Kokubo
Hi, I believe it is the falling edge of R/N counters is used
Hi
Thank you for your reply.
I simulated 4bits counter circuit by LTSPICE.
I show counter circuit and the result is as follow.
The falling edge of the counter output Q4 is made from the CLK rising edge of FF(A1).
Is the R counter falling edge made from the rising edge of REF ?
Is the N counter falling edge made from the rising edge of RFinA ?
Best regards
N.Kokubo
Hi
Thank you for your reply.
I simulated 4bits counter circuit by LTSPICE.
I show counter circuit and the result is as follow.
The falling edge of the counter output Q4 is made from the CLK rising edge of FF(A1).
Is the R counter falling edge made from the rising edge of REF ?
Is the N counter falling edge made from the rising edge of RFinA ?
Best regards
N.Kokubo