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LTC5589 I/Q modulator with AD9767 TxDAC reference circuit design


We are planning to use your LTC5589 I/Q modulator with AD9767 TxDAC for direct conversion of our modulated baseband signal upto 15MHz.

We are planning to operate the DAC Sampling speed around 80 to 125MSPS and base-band symbol rate from 1MHz to 15MHz and DAC is interfaced with FPGA.

We are looking for reference design from DAC to I/Q modulator interface section with Low pass filter for our above applications for optimum performance.

Please share the reference design circuits.

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  • Thanks for your reference circuit. But the reference circuit has single ended DAC output which has op-amp drivers circuits whereas we are planning to use DAC differential output directly to modulator with differential low pass filter and common mode circuits.

    Can you please share the application circuit with differential DAC output interface with low pass filter pass band 15MHz and Stop band around 60MHz.

    Also we have changed the DAC part from AD9767 to AD9117 due to Low power advantage.

  • Hello  , 

    My apologies for the delay in response. In the shared article, you can disregard the Single-Ended to Diff Driver circuit & refer to the DAC reconstructed LPF and LTC5589 IQ modulator interface. I believe the DAC-TO-MODULATOR INTERFACING section in page 49 of the datasheet can also be helpful.

    Unfortunately we do not have a reference circuit specific your LPF specifications but I'm sharing here references that are available:

    As the article mentioned, Ltspice is a great tool to validate your filter design. You can represent the DAC output as a voltage source with a series resistance (or the Thevenin equivalent) equal to the DAC load resistor. Hope this helps.

    In addition, the userguide which includes the Eval board schematic that can be used as an additional reference. there is also an ongoing Datasheet revision for the AD9117 and I'd like to share with you in advance the section that will be added under applications information: 



    The analog and digital sections of the AD9114/AD9115/AD9116/AD9117  have separate power supply inputs (AVDD, DVDDIO and CVDD) which can operate over 1.8 V to 3.3 V range.

    To ensure proper operation of the device, the RESET/PINMD pin should be pulsed high after applying power to all supplies. If the device will be operated in SPI mode, the minimum duration before setting the pin low is 50ns. If the device will be operated in pin mode, there is no need to set RESET/PINMD low after pulsing it high and, alternatively, the pin can be pulled up to DVDDIO.


    The user can employ several different decoupling capacitors to cover both high and low frequencies. These capacitors should be located close to the point of entry at the PCB level and close to the devices, with minimal trace lengths. Recommended decoupling capacitor values for each supply pin are one of each of the following: 10nF, 0.1uF, and 10uF. The smallest value capacitor should be placed nearest to the supply pin."

    For additional clarifications regarding AD9117, Please create a new post in High speed DACs EZ.

    Many Thanks,