HMC830 output SNR performances

Question

Hi to all, 
 I have integrated the HMC830 on a test signal generator to generate test signal in the frequency range 50-350 MHz. 
 My test board amplify the output of the HMC830 and filter the output to remove harmonics. 
 I shall obtain signal with high SNR to very the performance of the UUT (AD9650 sampling @800 Mhz) 
 The HMC850 reference signal comes from an AD9545 to obtain a low phase noise 50 MHz . 
 What is the suggested loop filter configuration values? How can I try to find the best ones? 
 I try to simulate and I change the values on one prototype but the results are bad, worst than the others that has been copied from the EVM board.

ADIApproved · Accepted Answer

Hi, 
 If you are able to measure the phase noise of your 50 MHz reference signal, you can model it in ADISIMPLL tool and optimize your loop filter based on the reference, PFD frequency and output frequency. 
 BTW, is this a new design effort or an existing product? We have released a PDN last month and HMC830 is now in Last Time Buy status and will be obsoleted after a while along with some other HMC products. If this is a new design, I would suggest you to check our alternative parts like ADF4355-x, ADF4356. 
 ADI_PDN_22_0023_Rev_-_Form.pdf (analog.com) 
 Regards, 
 Kudret)

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HMC830 output SNR performances