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ADF4159 Phase Coherence Between the chirp


We are using ADF4159 for ramp generation and we require phase coherence between the ramps. means phase of start freq of ramp should be phased matched with next ramp start frequency phase.

Kindly help me to make this with ADF4159 PLL.



Parents Reply
  • Hi, the example I sent is for two PLLs but the same applies to consecutive chirps on one ADF4159 PLL.

    In other words the chirps are unlikely to be in the same phase due to the SDM operation. The phase resync feature is what what you need to keep the signal phase coherent between frequency changes (when in fractional N mode) and our ramping PLLs such as ADF4159 do not have this phase resync feature. If you can measure the phase on the output with external circuitry then you could use the phase adjust controls you screenshotted to manually adjust the phase at the start of each ramp. 

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