ADF4159 Phase Coherence Between the chirp

Due to the fractional N sigma delta engine that the ramp generation uses, this is quite difficult maybe even impossible.

See here for more detail

 Phase consistency between two ADF4159/ADF4169 PLLs 

Dear Aandrew,

Thank you for quick response. Shared link speaks about the phase consistency between two PLL. But i am using single ADF4159 no multiple ADF4159.

I am programming the PLL in single sawtooth burst mode and providing the external trigger pulse to TXDATA, start the ramp periodically. I required phase coherence between ramps.

Let me know how below phase adjustment will work.

Kindly suggest on this.

Regards

Sushant

Dear Aandrew,

Thank you for quick response. Shared link speaks about the phase consistency between two PLL. But i am using single ADF4159 no multiple ADF4159.

I am programming the PLL in single sawtooth burst mode and providing the external trigger pulse to TXDATA, start the ramp periodically. I required phase coherence between ramps.

Let me know how below phase adjustment will work.

Kindly suggest on this.

Regards

Sushant

Hi, the example I sent is for two PLLs but the same applies to consecutive chirps on one ADF4159 PLL.

In other words the chirps are unlikely to be in the same phase due to the SDM operation. The phase resync feature is what what you need to keep the signal phase coherent between frequency changes (when in fractional N mode) and our ramping PLLs such as ADF4159 do not have this phase resync feature. If you can measure the phase on the output with external circuitry then you could use the phase adjust controls you screenshotted to manually adjust the phase at the start of each ramp.