Post Go back to editing

HMC4069 phase noise

Hello,

What is HMC4069's noise @ +10 Hz, ( Pll locked @ 100 MHz from 10 MHz reference)?

Our reference is -145 dBc/Hz @ +10 Hz, loop filter is 200 Hz width (active filter using THS4031).

We are measuring -110 dBc/Hz, while our simulation on simpll predict -120 dBc/Hz.

Thank you for your help.

Parents
  • Hi, could you attach your ADIsimPLL file? What is the signal power and waveform of the reference signal?

  • Simul PLL HMC4069 (Loop Bandwidth 100 Hz).zip

    Reference is a square waveform from LTC6957idd-4 (1.2Vpeakpeak).

    We have also tested directly from 10 MHz OCXO (+5dBm and +10dBm) with no difference.

    Our measure:

    Simpll file is ziped

    Thank you.

  • Hi, in the components section of your ADIsimPLL file the reference PN profile does not match up to measured phase noise of the ref.

    With the reference phase noise adjusted as per attached screenshot it matches closer to what you have measured. In this case, the simulated closed loop PN at 10Hz offset is ~118.4dBc/Hz. You are measuring ~112.5dBcHz so there is still a 6dBc difference, but it is less dramatic. If the LBW of the simulation is reduced to 70Hz then the simulated PN at 10Hz offset is ~115dBc/Hz which getting closer to measurement.

    So I think what you are measuring is probably the real performance. 

  • Thank you for your answers!

    We do agree on difference on the 10 MHz REF on simpll, and the reality.

    We are wainting on the delivery of a new 10 MHz reference with higher performance.

    We are trying to achieve :

    less than -100 dBc @ 1Hz

    less than -110 dBc @ 10Hz

    less than -120 dBC @ 100 Hz

    We have made many tests, with many BW (50 to 150 Hz), those specifications were never reached.

    We need very good performances from 1Hz to 10Hz? Do you recommand an other PLL? 

    What do you think about HMC440? Will it be better?

    Datasheets do not include performances between 1Hz and 100 Hz...

    Best regards,

  • Hi, the HMC440 has quite similar performance to the HMC4069. Also, going by the ADIsimPLL noise components I don't think reducing the FOM on the PLL side will help at 1-100Hz offsets in this application since it is already so low. If a lower noise reference does not help then the VCO noise might be too high. If the VCO PN in the ADIsimPLL is matched to your open loop measurement at 10Hz offset, the VCO noise component is somewhat close in level to the reference noise (at 10Hz offset - even more so at 100Hz). Is there another VCO you could try with better PN performance at the very low frequency offsets?

Reply
  • Hi, the HMC440 has quite similar performance to the HMC4069. Also, going by the ADIsimPLL noise components I don't think reducing the FOM on the PLL side will help at 1-100Hz offsets in this application since it is already so low. If a lower noise reference does not help then the VCO noise might be too high. If the VCO PN in the ADIsimPLL is matched to your open loop measurement at 10Hz offset, the VCO noise component is somewhat close in level to the reference noise (at 10Hz offset - even more so at 100Hz). Is there another VCO you could try with better PN performance at the very low frequency offsets?

Children
No Data