I'm having difficulty programming the HMC767 and I've found some related issues on the EngineerZone but so far the fixes haven't helped in my case. I'm trying to setup the PLL in fractional mode, however I'm meeting with limited success. The register values I use for initialization are below. They're similar to the default configuration for the PLL from the HMC PLL evaluation example, however I'm using an RDiv value of 2 and a different integer value.
At some time after powering the device (it can be several minutes) I'm sending all the default registers to the device using a Beaglebone Black. The SPI driver on the Beaglebone asserts the SEN line well before the first SCK cycle, so the device should be put in HMC mode. I can also read back these values and they contain what was written.
The first problem is that the after the PLL is initialized, it puts out a very strong ~8.91 GHz signal no matter what I set the integer or fractional registers to. Since I am changing the RDiv register, I toggle 0x07. I'm also writing the integer register then the fractional register at the end of the initialization, then toggling the SPI trigger register (0x0E). Is there a particular order that I should be writing the default values in or another register/value I should be looking into?
On a related note, I would also like to change the frequency of the PLL. When I attempt to do this, I am writing the integer register first, then the fractional register, then toggling the SPI trigger register, however the PLL frequency doesn't change. Is there another register or sequence of registers that I should be writing to change the frequency?
In regards to the hardware setup, I am using a custom board however the schematic and passive values (apart from the loop filter which was changed to a 4-pole design) are identical to the evaluation module.