Post Go back to editing

AD9375_Clocking PLL Reg.

Hi,
I am designing a module with AD9375 RF Transceiver. i need to provide reference clock of 122.88MHz<219fs jitter.
I came across AD9528 & HMC7044 which might meet my requirements.I calculated the Timing jitter using ADI Sim CLK as shown below,



It is observed that HMC7044 performance gets reduced a lot in lower frequencies while AD9528 phase noise remains same.
Can you suggest with which part should i proceed to meet the expected performance mentioned in AD9375 Data sheet.
Also it would be great if you can share the measured phase noise of AD9528 & HMC7044 at/near 122.88MHz.

Thanks in Advance,
Deva

Parents Reply Children
No Data