what is the max output power of the AD9959EVB

The EVB couples to the DAC output of the AD9959 via a center-tapped transformer (1:1 turns ratio). In addition, there is a 50Ω termination on each DAC output pin. Assuming a 50Ω termination (R_L) at the output of the transformer, the ideal power into R_L is -5.6dBm (see Application Note AN-912 for details involving transformer coupling to a DAC). However, the sinc response (sinx/x) of the DAC incurs another 0.5dBm of loss (assuming a system clock frequency of 500 MHz with the DDS set for 100 MHz out). Thus, the actual power into R_L is -6.1dBm, which is in agreement with your measurement results.

The EVB couples to the DAC output of the AD9959 via a center-tapped transformer (1:1 turns ratio). In addition, there is a 50Ω termination on each DAC output pin. Assuming a 50Ω termination (R_L) at the output of the transformer, the ideal power into R_L is -5.6dBm (see Application Note AN-912 for details involving transformer coupling to a DAC). However, the sinc response (sinx/x) of the DAC incurs another 0.5dBm of loss (assuming a system clock frequency of 500 MHz with the DDS set for 100 MHz out). Thus, the actual power into R_L is -6.1dBm, which is in agreement with your measurement results.

Hi KennyG,

Thanks for the information, it's clear now.

I have one question, assuming i will increase the Pull up resistors at the DAC output to be >> from RL,

I'm guessing i will suffer from unmatched impedance with the Filter after the transformer and maybe ending losing in

 both power and some harmonics due to some VSWR/return loss effects?

Thanks

A few considerations:

• Increasing R_O (the DAC load resistors) increases the voltage at the DAC output (assuming the other circuit components are unchanged). So, you must ensure that the circuit as a whole does not cause the voltage at the DAC output to violate the voltage compliance specification.
• VSWR is a transmission line effect. So, if you keep the circuit compact (relative to the shortest expected signal wavelength), you should be able to ignore VSWR.
• Return loss comes into play when you have a source with a defined impedance. Return loss is a measure of the matching between the load and the given source impedance. In your case, the source impedance is variable as defined by the component values chosen. That said, if the goal is to maximize power to the load, then return loss is immaterial.
• Spurious performance (i.e., harmonics) is somewhat unpredictable. You may need to experiment with the value of R_O in order to minimize harmonic spurs. That is, you may need to settle for a smaller value than expected to get the best spurious performance at the expense of less output power.