Post Go back to editing

HMC832 frequency lock by loading the GUI generated register file

Hi,

I am working on the HMC832 and I want to verify the frequency locking mechanism by loading the register file from the GUI using the EVAL board. 

The HMC832 is set to Fout=735MHz, using a 26MHz reference and RDiv=1, operating in integer mode (freq integer part 2940).

Every time I upload the register file the HMC832 does NOT lock and I need to press the "Update frequency" button to make it lock.

Can you please let me know how to write the register file in order to see the HMC832 locking on the target frequency at 735MHz?

Thanks

Regards

--------------------------------------------------------------

REVISION custom 735MHz Integer Mode
REG 0 20 // RESET command.
REG 1 2 // Default = 2. This value assigns PLL Chip Enable control to the SPI Reg 1 [1], 1 enabled, 0 disabled. To assign PLL CE control to CE pin, write Reg 1[0]=1.
REG 2 1A // Ref Divider Register-Default value = 1h (Rdiv=1). Program as needed.
REG 5 210 // Reg02 = 000000001 = fo (VCO output Div-by-1);
REG 5 F98 // Reg03 = 000011111 = Hi Perf, RF_P & RF_N enabled, 5dB RL,
REG 5 4B38 // Reg07 = 010010110 = o/p -6dB. For maximum o/p power program 4DB8h.
REG 5 0 // Close out VCO register programming by writing Reg 5 = 0.
//
REG 6 27C8 // Delta-Sigma Modulator Configuration Register. Program this value for Frac Mode.
REG 7 11AD // 14Dh is the default value for LD programming (correct for 50MHz comparison). For different configurations, especially higher PFD rates, this may need to change.
REG 8 C1BEFF // Default value = C1BEFFh. No need to program.
REG 9 3FFEFD // CP Register-Program as needed. 3FFEFDh = 2.54mA CP current with 635uA Up CP Offset current.
REG A 2046 // VCO Tuning Configuration Register-Program this value.
REG B F8061 // PFD/CP Control Register. Default value = F8061h. No need to program.
REG C 0 // Exact Frequency register. Default value =0h. No need to program if not using Exact Frequency Mode.
REG F 81 // Default vaue =1. 81h configures LD/SDO pin to output LD status always, except during SPI reads when the pin is automatically mux'ed to output the serial data.
//
REG 3 B7C // (38E0HEX 14560DEC), Integer VCO Divider Register-Progarm as needed to set frequency.
// REG 4 0 // Fractional VCO Divider Register-Program as needed to set frequency. When this register is written, a VCO auto-cal is initiated.
// REG 5 0 // Close out VCO register programming by writing Reg 5 = 0.
//
XTAL 26.0
VCO_TO_OUT_DIV 4

  • Hi,

    The problem is related with the Register 9 setting. Bit21 should be set as 0 in integer mode however it is set as 1 in your configuration. Update frequency button recalculates the register values and corrects it. This is why you are getting lock after clicking the button.

    If you set REG 9 1FFEFD   instead of REG 9 3FFEFD, you will get lock after loading the file. 

    Regards,

    Kudret