ADRF5020 RF Switch (ADRF5020BCCZN) on Evaluation Board (ADRF5020-EVALZ) not functioning correctly

I recently purchased the ADRF5020 RF Switch (ADRF5020BCCZN) on Evaluation Board (ADRF5020-EVALZ)  through Mouser Electronics which arrived in Perth, Australia on the 16th of August.

Through device characterisation and functionality testing, it was found both RF1 and RF2 ports exhibited strange behaviour. During tests, we ensured care was taken by adhering to device specs and following the power up sequence from the datasheet. GThe electrical parameter values and power up sequence we used are as follows;

  1. VDD set to 3.3 V DC from power supply.
  2. VSS set to -2.5 V DC from power supply.
  3. EN and CTRL set to 3.3 V Pulse from digital signal generator.
  4. RF signal applied to RFC port.

Here is an image of the setup

Figure 1: Test Setup

And a close up of the connections to the switch

Figure 2: Switch Electrical Connections

There are two issues we have observed. The first is DC biasing at both output ports. The RF signal is biased negatively from RF1 and positively from RF2. The two snap shots below were taken with our oscilloscope and highlight this behaviour. For each image, a 2.5 GHz signal is applied to RFC and the pulse generator is set to apply a 16 ns, 3.3 V pulse to CTRL on the switch. The oscilloscope is connected to RF1 for the first image, and RF2 for the second, and is terminated at 50 ohms.

 

Figure 3: RF1 Output

 

Figure 4. RF2 Output

The second issue occurs when the voltage to CTRL is set to low. A low impedance path is created between RFC and the port being measured, and the signal at RFC appears at the RF1/RF2, which decays after about 10 to 20 seconds. In this case there is no DC biasing of the RF signal.

Tests were performed on our own equipment to ensure the behaviour was not due to something other than the switch.

Could I please be advised on whether we are not operating the device correctly? If the switch is suspected to be damaged, what are the next steps we should take? Is it possible to send a replacement switch? I am happy to send through any other information or ship the switch itself for an external evaluation. I’ve attached the data sheet and images of our test setup and switch connection.



Changed wording
[edited by: Aaron_The_Engineer at 7:03 AM (GMT -4) on 7 Sep 2021]
  • 0
    •  Analog Employees 
    on Sep 7, 2021 10:13 PM

    1. When you applied a 2.5GHz signal to RFC, what was the power level?

    2. When you applied a 16 ns, 3.3 V pulse to CTRL, what did you apply to EN? 

    3. For a quick check about if the switch has been damaged, can you power up VDD and VSS only and measure each current? Are they comparable according to the datasheet typical value?

  • 1. When you applied a 2.5GHz signal to RFC, what was the power level?

    Power level for 2.5 GHz RF signal is 0 dBm.

    2. When you applied a 16 ns, 3.3 V pulse to CTRL, what did you apply to EN? 

    EN and CTRL are connected to the digital signal generator. During the pulse "on" cycle, CTRL is 3.3 V, and EN is 0 V. During pulse "off" cycle, CTRL is 0 V, and EN is 0 V.

    3. For a quick check about if the switch has been damaged, can you power up VDD and VSS only and measure each current? Are they comparable according to the datasheet typical value?

    For current draw, VDD = 3.3V results in 3.3 mA of current. For VSS = -2.5 V, current draw is initially -0.3mA, which settles to -0.05 mA after roughly 10 seconds. The data sheet states current through terminals VDD and VSS should measure 80 uA and <1 uA, respectively. The measured values are much higher than this.

  • 0
    •  Analog Employees 
    on Sep 8, 2021 5:43 PM in reply to Aaron_The_Engineer

    0dBm RF power should be OK as long as ADRF5020 is biased correctly. From your description, VDD and VSS current are too high, therefore, I am suspecting that the switch digital circuit has been damaged. 

    1. Your CTRL and EN logic is correct, however, I think 16ns pulse may be too fast. The on/off time is 10ns typical but there is part to part variance. Also the 0.1dB settling time is 15ns. 16ns pulse is marginal so that the switch might not reach its final RF output value before it was switches off. Is 16ns pulse a hard requirement? Can you slow it down?

    2. For CTRL and EN pulse, did you set up the digital signal generator to be highZ (high impedance)? This is required.

    3. I would suggest you find a brand new ADRF5020 and test VDD and VSS only first. If it works, you can add CTRL and EN later with a slower rate to make sure your bias circuit is functioning as you expected.

  • 1. Your CTRL and EN logic is correct, however, I think 16ns pulse may be too fast. The on/off time is 10ns typical but there is part to part variance. Also the 0.1dB settling time is 15ns. 16ns pulse is marginal so that the switch might not reach its final RF output value before it was switches off. Is 16ns pulse a hard requirement? Can you slow it down?

    Although 16 ns isn't a hard requirement, we do aim for low nanosecond pulse capabilities. The switch was purchased due to its low nanosecond switching time, however for now, pulses less than 200 ns will work for the project. In the future we may require a switch capable of operating in the high picosecond range. 

    2. For CTRL and EN pulse, did you set up the digital signal generator to be highZ (high impedance)? This is required.

    The digital signal generator was set to high-Z for all tests.

    3. I would suggest you find a brand new ADRF5020 and test VDD and VSS only first. If it works, you can add CTRL and EN later with a slower rate to make sure your bias circuit is functioning as you expected.

    Are Analog Device product's covered under warranty if a received device is shown to be damaged?

  • 0
    •  Analog Employees 
    on Sep 9, 2021 5:31 PM in reply to Aaron_The_Engineer

    I highly doubt that the device is damaged before you received it since we have already verified it before shipment. Before the above test, did you run any other test? Or the above screenshot was you first and only test to this device?

    Your power up sequence looks OK to me, but you need to make sure that each bias pin is grounded first without floating.

    Moreover, ADRF5020 EVB has no pull-up or pull-down resistor on the board (Fig 21) and neither in the internal design (Fig 7). Therefore, as I mentioned above, you need to set up a common ground for each bias pin and pre-define CTRL and EN either low or high state before powering up.

    The reason why I am suspecting is because you said " For VSS = -2.5 V, current draw is initially -0.3mA, which settles to -0.05 mA after roughly 10 seconds". This seems to me that your bias pin is still floating at t=0 and it settles down after 10sec which is not correct. One extra question, when you saw 3.3mA Vdd current, did you set up any current clamp at 3.3mA or this is the real reading of the current?