As shown in the problem, when ADF4372 tests the output signal, it is found that the bottom noise of the output signal is raised in decimal mode. It shows that there are moving spurts around the proximal end of the spectrum line, as shown in the figure below:
The integer mode is normal, as shown in the following figure:
The PLL Settings are as follows:
LP=368KHz, 47DEG placed on the back of the PCB
The schematic diagram and power supply are consistent with those on the evaluation board.
Please help to analyze what causes this phenomenon.