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About ADF4372 output spectrum

Hi all

As shown in the problem, when ADF4372 tests the output signal, it is found that the bottom noise of the output signal is raised in decimal mode. It shows that there are moving spurts around the proximal end of the spectrum line, as shown in the figure below:

The integer mode is normal, as shown in the following figure:

The PLL Settings are as follows:
LP=368KHz, 47DEG placed on the back of the PCB
The schematic diagram and power supply are consistent with those on the evaluation board.
Please help to analyze what causes this phenomenon.

  • Hi,

    Did you use the series 91Ω at the output of CP. This resistor has an impact on the spur levels.

    Bleed current is used to optimize the spurs as well as the phase noise. The automatic calculated value is good point to start but not the best value for all cases. Can you please try to change the bleed current to see if that helps in any way? Generally increasing the bleed current helps but that is also application dependent.

    Also while locking to a new frequency, the Phase Word value (Phase adjust is disabled) affects the spur levels. Some prime numbers around 45°, 90° and 180° were investigated and 8388617 value showed the best result in our tests. This may change depending on the output frequency, application, configuration but a prime number around 45°, 90° or180° is recommended.

    Regards, Kazim