ADF4155 frac-N PN Floor PLLsim vs Datasheet?

The ADF4155 data sheet shows normalized phase noise floor spec as --218 in frac-N mode and -223 in Int mode.

I ran PllSim for an ADF4155 frac-N design  and the side panel shows (under Chip -> Phase Detector -> PN Floor) that it used -223 for a frac-N design.

I downloaded the latest PLLSim and datsheet and no change.

Which is correct PN floor for frac-N 4155?

Mike Lavelle

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