ADAR1000 operating problem

Hi EZ experts,

We have ADAR1000 EVB and [ADAR1000_MaxGain_SettingsFiles] from website.

There are some question about them.

1.  0x035 & 0x036

The registers control VM & VGA BIAS of TX & RX.

a) Why table 6 is different to [ADAR1000_MaxGain_SettingsFiles].

b) What the unit of the effect that we adjust each LSB in these regisrer?

2. 0x400 & 0x401

a) Which LDO(1.8 or 2.8 or both) do 0x400 effect? And how did it effect, i.e how much volt or percentage do each LSB effect?

b) In [ADAR1000_MaxGain_SettingsFiles] , why doesn't it need to set 0x401 to 0b10 before setting 0x400?

3. bit 7(SW_DRV_TR_MODE_SEL) of 0x030

It says [If 0, TR_SW_NEG is enabled, and if 1, TR_SW_POS is enabled.] in datasheet. 

But we observed something just  reverse, i.e.  [TR_SW_NEG is enabled when SW_DRV_TR_MODE_SEL=1, and TR_SW_POS is enabled when SW_DRV_TR_MODE_SEL=1.]

 4. Script review

We want to control T&R by using TR pin and we want ADAR1000 to bias ADTR1107.

Can we successfully to use the script as below to do so ?

0081

0018

40055

3860

2e7f

2f7f

3408

3555

262d

3706

3194

2d00

4a6b

2935

466b

30df

1cff

2036

2136

2802

Parents
  • 0
    •  Analog Employees 
    on Apr 27, 2021 6:51 PM

    4)  I found a couple of things you may want to examine:

    - Did you mean 362D, rather than 262D (which would be setting the I Vector of Tx Channel 4)?

    - The ADTR1107 has a positive going switch control, so I believe you want to change "30DF" to "305F"

  • Thanks a lot for your help, you are right about the 2 register.

    But when I load the code into the EVB(EVAL-ADAR1000, Rev. B), there are some issues.

    I mount a 0 ohm at R75 which was DNI to observe TR_SW_POS form P9A-pin3.

    I tried to switch TR(P6-pin9) to see if TR_SW_POS(P9A-pin3) react normal.

    But have issues below

    1) TR(P6-pin9) sink 30mA@1V, which much more than 1uA

    2)  TR_SW_POS(P9A-pin3) do change high and low following TR, but the high of TR_SW_POS(P9A-pin3) is 0.64V, the low of TR_SW_POS(P9A-pin3) is 0.3V. Which should be 3.3V or 0V.

  • 0
    •  Analog Employees 
    on May 4, 2021 3:06 PM in reply to avatarofcliff@hotmail.com

    1)  It seems like there is a low impedance path to ground on the P6.  I would measure the resistance on this node.  Also, it sound like you are driving pin 9 of P6; I would disable the output of the level translator that drives the TR pin by shorting P9's pins with a socket.

    2)  How are you measuring/observing TR_SW_POS?  WIth an Oscilloscope?  If so make sure your probe impedance is set high (usually 1 Meg Ohm).  If you have your impedance set to 50 Ohms the output buffer do not have enough current to drive to the full-scale voltage.

    Please confirm you have the Rev. C/D board?

Reply
  • 0
    •  Analog Employees 
    on May 4, 2021 3:06 PM in reply to avatarofcliff@hotmail.com

    1)  It seems like there is a low impedance path to ground on the P6.  I would measure the resistance on this node.  Also, it sound like you are driving pin 9 of P6; I would disable the output of the level translator that drives the TR pin by shorting P9's pins with a socket.

    2)  How are you measuring/observing TR_SW_POS?  WIth an Oscilloscope?  If so make sure your probe impedance is set high (usually 1 Meg Ohm).  If you have your impedance set to 50 Ohms the output buffer do not have enough current to drive to the full-scale voltage.

    Please confirm you have the Rev. C/D board?

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